Multi-Layer Substrate Edge Pads for Low-Inductance Power Delivery
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Solution Overview
Problem
Current multi-layer substrates face challenges in delivering high power efficiently due to low copper density, high inductance, and noise coupling issues, particularly with increasing power requirements for next-generation electronic and optoelectronic modules, which are exacerbated by the 'Swiss Cheese' phenomenon and limited current carrying capacity of traditional vias.
Innovation Solution
The implementation of edge pads with increased thickness and width, connected directly to power and ground planes, providing low inductance paths and higher current carrying capacity, while surrounding power planes with ground planes to mitigate noise and eliminate the need for traditional power and ground vias, thereby improving power integrity and reducing substrate footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional vias are used for power delivery in multi-layer substrates, then power can be delivered through the substrate, but the current carrying capacity is limited and inductance is high
Solution Approach 1:
The patent transitions from traditional via-based power delivery (vertical dimension through substrate) to edge pad-based power delivery (peripheral dimension along substrate edges). This dimensional change allows for larger effective contact area and lower inductance paths, resolving the contradiction between power delivery capability and current carrying capacity.
Solution Approach 2:
The patent changes the geometric parameters of power delivery structures by using edge pads with increased thickness and width compared to traditional vias. This parameter change enables higher current density and lower inductance, directly addressing the limitation of traditional via-based power delivery.
2Power
If traditional via-based power delivery is used, then power can be delivered to components, but noise coupling and inductance issues occur
Solution Approach 1:
The patent extracts the power delivery function from the interior via structures and relocates it to edge pad structures at the substrate periphery. This extraction removes the noise coupling and inductance problems associated with internal vias while maintaining power delivery functionality.
Solution Approach 2:
The patent introduces ground planes as intermediary structures surrounding the power planes. These ground planes act as shields that mitigate noise coupling and provide return paths, resolving the noise coupling issue while enabling effective power delivery.
3Power
If more copper is used in power planes, then current carrying capacity increases, but substrate area is consumed
Solution Approach 1:
The patent moves power delivery structures to the edges of the substrate, utilizing the peripheral dimension rather than consuming central substrate area. This allows for increased effective copper area for power delivery without proportionally increasing the substrate footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases current density and reduces inductance, enabling efficient high-power delivery with improved noise isolation and reduced substrate size, addressing the limitations of traditional via-based power delivery systems.
Implementation Method 1
the at least one ground pad provides a low inductance ground path to the ground plane
Implementation Method 2
the at least one power pad provides a low inductance power path to the power plane
Implementation Method 3
surrounding power planes with ground planes to mitigate noise
Data Source
AI summary
A multi-layer substrate stacking a plurality of insulating substrates supports one or more devices. Each substrate includes a face supporting conductive traces and edges surrounding the face at a substantially perpendicular angle. The multi-layer substrate includes a ground plane on a first substrate and a power plane on a second substrate. The ground plane is connected to at least one ground pad disposed on a first edge of the first substrate, which provides a low inductance ground path to the ground plane. The power plane is connected to at least one power pad disposed on a second edge of the second substrate, which provides a low inductance power path to the power plane.