Substrate Element Reducing Parasitic Capacitance Series Resistance

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Solution Overview

Problem

Capacitor-based isolation solutions in integrated circuits suffer from parasitic capacitance, leading to signal-path attenuation and limited operating frequencies due to series resistance, which results in poor power efficiency and reduced bandwidth.

Innovation Solution

Incorporating a substrate element with conductive doped regions that overlap the reference terminal and the bottom plate of the isolation capacitor, reducing series resistance and improving the quality factor of parasitic capacitance, thereby enabling higher frequency data communications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If capacitor-based isolation solutions are used to provide electrical isolation, then electrical isolation between systems is achieved, but parasitic capacitance causes signal energy loss and limits operating frequency

Engineering Contradiction:
Improveelectrical isolationVSAvoidsignal energy loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

A substrate element is introduced as an intermediary component between the bottom plate of the isolation capacitor and the reference terminal. This substrate element includes conductive regions that reduce the series resistance of the parasitic capacitance, thereby reducing signal energy loss while maintaining the electrical isolation function of the capacitor.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameters of the substrate by adding conductive regions with specific resistance values. This modifies the series resistance parameter of the parasitic capacitance, transforming it from a high-resistance path that causes energy loss to a low-resistance path that minimizes signal attenuation while preserving isolation.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If capacitor-based isolation solutions are fabricated on substrate, then isolation capacitor is formed, but series resistance limits operating frequency for data communications

Engineering Contradiction:
Improveisolation capacitor fabricationVSAvoidoperating frequency
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The invention addresses the frequency limitation by adding a dimensional element to the substrate structure. Conductive regions are distributed throughout the substrate volume beneath the capacitor, creating a three-dimensional conductive path that reduces series resistance and enables higher operating frequencies without complicating the standard fabrication process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If large amounts of parasitic capacitance are present, then bandwidth is limited, but adding substrate elements increases device complexity

Engineering Contradiction:
ImprovebandwidthVSAvoidsubstrate structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The substrate element is merged with the existing substrate structure during fabrication. The conductive regions are integrated into the substrate material itself, combining the substrate's mechanical support function with the electrical function of reducing parasitic capacitance series resistance, thereby increasing bandwidth without significantly increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The improved quality factor reduces dissipative losses through parasitic capacitance, allowing for higher frequency data communications without compromising the isolation rating of the capacitor.

Implementation Method 1

The substrate element includes a conductive region in the substrate and aligned with the first conductive element and the reference contact

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

The first conductive element having an associated parasitic capacitance

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20220209750A1Quality factor of a parasitic capacitance
Publication Date: 2022.06.30 TEXAS INSTRUMENTS INC
  • US20220209750A1 patent drawing
  • US20220209750A1 patent drawing
  • US20220209750A1 patent drawing

AI summary

An integrated circuit includes a substrate, a reference contact coupled to the substrate, a capacitor over the substrate, and a substrate element. The capacitor includes a first conductive element having an associated parasitic capacitance and a second conductive element electrically isolated from the first conductive element. The substrate element is coupled to the first conductive element by the parasitic capacitance and coupled to the reference contact. The substrate element includes a conductive doped region in the substrate and aligned with the first conductive element and the reference contact.