Component-Incorporated Substrate Layout for Flatness and Downsizing
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Solution Overview
Problem
Existing component-incorporated substrates face challenges in achieving further downsizing while maintaining flatness in the periphery of openings housing electronic components, as they require space for a frame-like section to secure substrate flatness, limiting overall downsizing.
Innovation Solution
A component-incorporated substrate with a multi-layer structure where wiring patterns are intensively disposed in a frame shape around the opening, allowing for batch-lamination without a conventional frame-like section, ensuring flatness and enabling overall downsizing by controlling the spacing and positioning of wiring patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a frame-like section is formed to surround the opening, then flatness of the substrate surface in the periphery of the opening is secured, but the substrate cannot be downsized due to the space required for the frame-like section
Solution Approach 1:
The invention extracts the essential function of the frame-like section (securing flatness during batch-lamination) and repositions it to the periphery of the opening rather than requiring it to surround the opening. This is achieved by forming a conductive layer in the periphery region that provides the necessary structural support and flatness maintenance, while eliminating the need for a surrounding frame structure, thereby enabling substrate downsizing.
Solution Approach 2:
The invention transitions from a two-dimensional frame-like section surrounding the opening to a peripherally-positioned conductive layer structure. By relocating the flatness-providing function to the periphery and utilizing the conductive layer's inherent structural properties, the design achieves the same flatness security without the area penalty of a surrounding frame.
2Area of stationary object
If the opening size is reduced for downsizing, then substrate area is reduced, but positioning accuracy of the electronic component becomes more difficult to maintain
Solution Approach 1:
The invention introduces a peripherally-positioned conductive layer as an intermediary structure that provides reference points and structural stability for positioning the electronic component. This conductive layer acts as a mediator between the reduced opening size and the positioning accuracy requirement, enabling precise component placement even in smaller substrates by providing stable peripheral reference structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves downsizing of the substrate while maintaining flatness in the periphery of the opening, reducing the risk of mounting defects by preventing recesses and ensuring uniform adhesive distribution during thermo-compression bonding.
Implementation Method 1
a plurality of printed wiring base members are batch-laminated via an adhesive layer
Implementation Method 2
at least part of the wiring pattern of the printed wiring base member where the opening is formed is disposed in a frame shape surrounding the opening, in a periphery of the opening
Implementation Method 3
a resin base member that has a wiring pattern formed on at least one surface thereof and that has formed therein a via connected to the wiring pattern
Data Source
AI summary
A component-incorporated substrate of multi-layer structure includes: a first printed wiring base having an opening; a second printed wiring base in a first side of the first printed wiring base; a third printed wiring base in a second side of the first printed wiring base; an electronic component housed in the opening of the first printed wiring base; a via penetrating one or more of the first printed wiring base, the second printed wiring base and the third printed wiring base; and an adhesive layer that fills a gap between the electronic component and the opening, a gap between the first printed wiring base and the second printed wiring base, and a gap between the first printed wiring base and the third printed wiring base.


