Substrate-Free RDL Package Assembly for Thin Multi-Die Stacking
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Solution Overview
Problem
Conventional semiconductor packaging methods using pre-formed substrates result in thick packages due to the substrate thickness, making it difficult and costly to include multiple semiconductor dies in a single package.
Innovation Solution
The development of substrate-free semiconductor device assemblies with upper and lower Redistribution Layers (RDLs) that are electrically connected by interconnects, allowing multiple semiconductor dies to be arranged back-to-back and packaged without the need for a pre-formed substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If pre-formed substrates are used in semiconductor packaging, then structural support and electrical connection are provided, but package thickness increases and multiple dies cannot be efficiently accommodated
Solution Approach 1:
The patent extracts and removes the pre-formed substrate from the packaging structure, eliminating the thickness constraint while maintaining structural support through alternative means (mold compound and interconnect structures). This allows multiple dies to be stacked vertically without the substrate interfering with the compact arrangement.
Solution Approach 2:
The patent transitions from a planar packaging approach (constrained by substrate thickness) to a three-dimensional stacked architecture. Multiple dies are arranged in the vertical dimension through back-to-back bonding, enabling compact packages that accommodate multiple devices without increasing lateral footprint or relying on thick substrates.
2Adaptability or versatility
If multiple semiconductor dies are included in a single package, then device functionality and integration are improved, but packaging cost and complexity increase
Solution Approach 1:
The patent segments the interconnection structure into modular units - each die is bonded back-to-back with its own set of interconnects, and these modules are replicated for multiple dies. This segmentation allows standardized manufacturing processes to be applied repeatedly, reducing overall complexity despite multiple devices.
Solution Approach 2:
The patent merges multiple dies into a single integrated package with shared mold compound encapsulation and coordinated interconnect structures. The back-to-back bonding approach allows adjacent dies to share common structural elements, reducing the total number of separate packaging operations needed compared to individual packaging.
Data Source
AI summary
A semiconductor device assembly includes a first remote distribution layer (RDL), the first RDL comprising a lower outermost planar surface of the semiconductor device assembly; a first semiconductor die directly coupled to an upper surface of the first RDL by a first plurality of interconnects; a second RDL, the second RDL comprising an upper outermost planar surface of the semiconductor device assembly opposite the lower outermost planar surface; a second semiconductor die directly coupled to a lower surface of the second RDL by a second plurality of interconnects; an encapsulant material disposed between the first RDL and the second RDL and at least partially encapsulating the first and second semiconductor dies; and a third plurality of interconnects extending fully between and directly coupling the upper surface of the first RDL and the lower surface of the second RDL.


