Substrate Impedance Inspection for Early Stacked-Wire Defect Detection

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Solution Overview

Problem

Existing substrate inspection methods in semiconductor manufacturing are inefficient in detecting defects in highly stacked V-NAND flash memory structures, leading to increased time and cost in the fab-out process.

Innovation Solution

A substrate inspection method that calculates impedance values by modeling the electric circuit of internal wires in a semiconductor substrate, applying AC and DC power to measure capacitance and resistance values, and comparing them to a circuit model to determine reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If highly stacked layers are used to maximize chip capacity, then storage capacity increases, but defect detection difficulty increases and defects may not be detected in FAB-in process

Engineering Contradiction:
Improvechip capacityVSAvoiddefect detection difficulty
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The patent replaces physical/visual inspection methods with electrical impedance measurement. By applying AC power to the substrate and measuring impedance values through connection wires, the system can detect defects (such as short circuits between word lines) electrically rather than through physical inspection, enabling early detection in the FAB-in process while maintaining high chip capacity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses impedance values as an intermediary parameter to detect defects. Instead of directly inspecting the complex stacked structure, the system measures impedance through connection wires and compares it with a circuit model. This intermediary measurement approach enables indirect detection of internal defects in highly stacked structures without requiring direct access to each layer

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If defects are detected in FAB-out process, then defect detection is possible, but time and cost are consumed

Engineering Contradiction:
Improvedefect detectionVSAvoidinspection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs defect detection preliminarily in the FAB-in process rather than waiting for the FAB-out process. By implementing impedance measurement and circuit model comparison during manufacturing, defects are detected early when they can be addressed more efficiently, eliminating the need for time-consuming post-manufacturing inspection while maintaining high detection reliability

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If impedance values are calculated and compared with circuit model, then substrate reliability is determined accurately, but measurement and calculation complexity increases

Engineering Contradiction:
Improvereliability determination accuracyVSAvoidmeasurement and calculation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent creates a simplified circuit model that copies the essential electrical characteristics of the complex substrate structure. Instead of measuring every component in the highly stacked substrate, the system uses a representative circuit model with equivalent impedance values. This model copying approach maintains measurement precision while significantly reducing the complexity of actual measurements and calculations

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Reduces time and cost by accurately determining substrate reliability through impedance calculations, identifying defects early in the process, and ensuring high-quality production.

Implementation Method 1

AC power is applied to the substrate stage to obtain measured capacitance values of the internal wires through currents that are obtained from the connection wires

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

DC power is applied to the substrate stage to obtain measured resistance values of the internal wires through voltages that are obtained from the connection wires

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS12352808B2Substrate inspection apparatus and substrate inspection method
Publication Date: 2025.07.08 SAMSUNG ELECTRONICS CO LTD
  • US12352808B2 patent drawing
  • US12352808B2 patent drawing
  • US12352808B2 patent drawing

AI summary

In a substrate inspection method, a substrate is provided on a substrate stage, the substrate having internal wires and connection wires, the internal wires respectively provided between stacked insulating layers, the connection wires respectively extending from the internal wires and exposed to an upper surface of the substrate. An electric circuit of the internal wires in the substrate is modeled to generate a circuit model. AC power is applied to the substrate stage to obtain measured capacitance values of the internal wires through currents that are obtained from the connection wires. DC power is applied to the substrate stage to obtain measured resistance values of the internal wires through voltages that are obtained from the connection wires. Impedance values of the internal wires are calculated through the measured capacitance values and the measured resistance values. The impedance values and the circuit model are compared to determine reliability of the substrate.