Recessed Substrate Interconnects With Passivation for Safe Exposure

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Solution Overview

Problem

Mechanical removal of solder resist material to expose electrical interconnects on substrates can damage the substrate, leading to electrical faults and reduced manufacturing yield due to stress-induced fractures, especially in brittle substrates.

Innovation Solution

A passivation layer is applied to the substrate to facilitate surface finishing of interconnects without mechanical removal, minimizing stress and fracture risk while enhancing coupling with solder and reducing substrate thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If mechanical removal of solder resist material is used to expose electrical interconnects, then the interconnect surface can be accessed for solder coupling, but the substrate can be damaged causing stress-induced fractures and electrical faults

Engineering Contradiction:
Improveexposure of interconnect surfaceVSAvoidsubstrate integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

A passivation layer is introduced as an intermediary between the solder resist material and the interconnect surface. This passivation layer is selectively removed to expose the interconnect surface for solder coupling while protecting the underlying substrate from mechanical damage during the removal process, thus resolving the contradiction between ease of operation and reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If mechanical removal of solder resist material is performed, then the interconnect surface is exposed for solder coupling, but manufacturing yield is reduced due to substrate damage

Engineering Contradiction:
Improveexposure of interconnect surfaceVSAvoidmanufacturing yield
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The passivation layer serves as a protective intermediary that enables safe mechanical removal of solder resist material. By placing the passivation layer between the removal process and the substrate, it allows the interconnect surface to be exposed while preventing substrate damage, thereby maintaining high manufacturing yield

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of moving object

If the substrate is made thinner to reduce device size, then the device becomes more compact, but the substrate becomes more susceptible to stress-induced fractures

Engineering Contradiction:
Improvesubstrate thicknessVSAvoidresistance to stress-induced fracture
Core Design Contradiction:
Length of moving objectVSStrength

Solution Approach 1:

The passivation layer is applied beforehand to cushion and protect the thin substrate from stress-induced fractures during the mechanical removal of solder resist material. This protective layer compensates for the reduced structural strength of thinner substrates, enabling safe processing while maintaining compact device dimensions

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240006298A1Substrate having one or more electrical interconnects
Publication Date: 2024.01.04 INTEL CORP
  • US20240006298A1 patent drawing
  • US20240006298A1 patent drawing
  • US20240006298A1 patent drawing

AI summary

An electronic device may include an integrated circuit, for instance a semiconductor die. The electronic device may include a substrate having a first layer and a second layer. The first and second layers may include interconnects recessed below a surface of the substrate. The substrate may include a passivation layer directly coupled with portions of the interconnects. A solder resist material may at least partially cover portions of the passivation layer directly coupled with the first interconnect surface.