Substrate Interconnect Pockets for Thermal Stress Reduction
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Solution Overview
Problem
The existing substrates for electronic devices face challenges in reliability due to stress between layers caused by differing coefficients of thermal expansion, leading to delamination and cracks that can result in open or short circuits.
Innovation Solution
A substrate with multiple layers, including exterior and interior layers made of non-photo-definable dielectric materials with similar coefficients of thermal expansion, reducing stress and improving mechanical properties, and featuring interconnect pockets with tapered profiles to enhance electrical isolation and connection reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If layers with different coefficients of thermal expansion are used in the substrate, then the substrate can be manufactured with available materials, but stress between layers occurs leading to delamination and cracks
Solution Approach 1:
The patent applies homogeneity by selecting dielectric materials for different layers (exterior and interior) that have similar coefficients of thermal expansion. This reduces the stress differential between layers during thermal cycling, preventing delamination and cracks while maintaining manufacturability with available materials.
Solution Approach 2:
The patent uses composite materials strategy by carefully selecting and combining different dielectric materials (e.g., epoxy-based materials with fillers) for exterior and interior layers. The composite approach allows tuning the CTE of each layer to be相匹配, reducing thermal stress while maintaining other required material properties for manufacturing.
2Ease of manufacture
If traditional flat interconnect structures are used, then manufacturing is simpler, but electrical isolation between adjacent interconnects is insufficient
Solution Approach 1:
The patent applies curvature by forming interconnect pockets with tapered sidewalls (greater than 5:1 aspect ratio) instead of flat vertical walls. This tapered geometry provides gradual transition and improved electrical isolation between adjacent interconnects embedded in the dielectric layers, reducing the risk of electrical breakdown while remaining manufacturable.
3Adaptability or versatility
If exterior layers use materials with different CTE than interior layers, then material selection is flexible, but the substrate experiences thermal stress leading to reduced mechanical properties
Solution Approach 1:
The patent applies parameter changes by carefully selecting and adjusting the coefficient of thermal expansion parameter of dielectric materials used in exterior and interior layers. By matching the CTE values of adjacent layers, the patent maintains material selection flexibility while minimizing thermal stress and preserving the mechanical strength and integrity of the multi-layer substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the mechanical properties and reliability of the electronic device by minimizing thermal stress between layers, reducing the likelihood of delamination and cracks, and improving electrical connectivity.
Implementation Method 1
exterior layers may include a non-photo-definable dielectric material... The first coefficient of thermal expansion may be within 20 ppm/° C. of the second coefficient of thermal expansion
Data Source
AI summary
A substrate for an electronic device may include one or more interconnect pockets. Each of the interconnect pockets may be defined by a first pocket wall and a second pocket wall that may extend between the first pocket wall and the second exterior surface of the substrate. The second pocket wall may extend from the first pocket wall at a wall angle that is greater than or equal to 90 degrees. Individual interconnects may be located within respective individual ones of the interconnect pockets.