Substrate Interconnection Structure With Low-Profile Metal Pillars
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packages are inadequate, leading to excess cost, decreased reliability, and large package sizes.
Innovation Solution
The use of an adhesive layer to attach an upper electronic package to a lower die and metal pillars for electrical connection, where the pillars have a smaller height than the die, along with an encapsulant covering the package, to reduce thickness and processing time while maintaining electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional semiconductor packages are used, then electrical connectivity is achieved, but package size becomes too large
Solution Approach 1:
The patent transitions from planar packaging to three-dimensional stacking architecture, where multiple semiconductor dies are vertically stacked and interconnected through through-silicon vias (TSVs). This vertical integration enables electrical connectivity between layers while dramatically reducing the horizontal footprint and overall package volume compared to conventional lateral interconnections.
Solution Approach 2:
The patent implements nested interconnection structures where conductive TSVs are embedded within semiconductor dies, which are then stacked and enclosed within a protective package substrate. The TSVs are nested within the die structure, and multiple dies are nested vertically, creating a compact hierarchical arrangement that reduces package size while maintaining connectivity.
2Ease of manufacture
If conventional semiconductor packages are used, then structural support is provided, but manufacturing cost increases
Solution Approach 1:
The package substrate serves multiple functions simultaneously: it provides mechanical support for the stacked dies, acts as an interconnection carrier with embedded conductive traces, offers thermal management pathways, and provides environmental protection. This multi-functionality eliminates the need for separate structural components, reducing manufacturing complexity and cost while maintaining structural integrity.
Solution Approach 2:
The patent merges the structural support function with the electrical interconnection function by integrating conductive TSVs directly into the semiconductor dies and combining multiple dies into a single stacked assembly. This consolidation reduces the number of discrete components and assembly steps, thereby lowering manufacturing cost while preserving structural support through the integrated architecture.
3Length of moving object
If metal pillars with larger height are used, then electrical connectivity is improved, but device thickness increases
Solution Approach 1:
The patent employs vertical TSV interconnections that traverse through the thickness of semiconductor dies to establish electrical pathways between stacked layers. This vertical routing in the thickness dimension enables efficient electrical connectivity without requiring lateral extension, thereby maintaining compact device thickness while achieving reliable inter-layer connections.
Solution Approach 2:
The package substrate acts as an intermediary structure that receives and routes electrical signals from TSVs of stacked dies. The substrate's conductive traces and vias provide additional connection pathways, enabling reliable electrical connectivity between different die layers without requiring excessively long TSVs, thus controlling overall device thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a semiconductor device with reduced thickness and processing costs, enhanced reliability, and improved manufacturing efficiency.
Implementation Method 1
utilizing an adhesive layer to attach an upper electronic package to a lower die
Data Source
AI summary
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing an adhesive layer to attach an upper electronic package to a lower die and/or utilizing metal pillars for electrically connecting the upper electronic package to a lower substrate, wherein the metal pillars have a smaller height above the lower substrate than the lower die.