Substrate Motherboard Testing via Extended Detection Terminals
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Solution Overview
Problem
The challenge in micro/mini LED display technology is the difficulty in testing substrate motherboards due to the small size of connection terminals, which makes alignment and contact with probes challenging, and prone to scratching during testing.
Innovation Solution
The substrate motherboard design includes a first substrate base with active and non-active regions, featuring a first conductive pattern layer with signal lines, insulating layers, and a second conductive pattern layer with connection and detection terminals. Leading-out wires extend to the non-active region, allowing probes to contact detection terminals instead of connection terminals, reducing the risk of damage and facilitating testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If probes directly contact connection terminals for testing, then testing can be performed, but the small size of connection terminals makes alignment difficult and prone to scratching
Solution Approach 1:
The patent introduces leading-out wires as intermediary elements that extend from the connection terminals to the non-active region where detection terminals are located. These leading-out wires serve as mediators that transfer the testing function from the small, difficult-to-access connection terminals to larger, easier-to-access detection terminals, thereby resolving the alignment difficulty while maintaining testing reliability
Solution Approach 2:
The substrate motherboard is divided into an active region containing connection terminals and a non-active region containing detection terminals. This segmentation separates the functional connection area from the testing area, allowing detection terminals to be positioned in a region optimized for probe access and alignment without interfering with the active connection functions
2Reliability
If probes contact small connection terminals, then testing is possible, but damage to connection terminals occurs during testing
Solution Approach 1:
Leading-out wires act as intermediaries that bear the mechanical contact from probes during testing, protecting the connection terminals from direct probe contact and potential scratching. The detection terminals in the non-active region serve as sacrificial testing points that can be accessed without risking damage to the functional connection terminals
Solution Approach 2:
The leading-out wires and detection terminals are pre-configured in the non-active region before final assembly, establishing a dedicated testing pathway that redirects probe contacts away from vulnerable connection terminals, thereby preventing damage before it can occur during the testing process
Data Source
AI summary
The present disclosure provides a substrate motherboard including: a first substrate base, a first conductive pattern layer, at least one first insulating layer and a second conductive pattern layer which are sequentially arranged. The first conductive pattern layer includes a plurality of signal lines in the active region. The second conductive pattern layer includes a plurality of connection terminals in the active region, and the plurality of connection terminals are electrically coupled to corresponding signal lines in the plurality of signal lines. The substrate motherboard further includes a plurality of leading-out wires and a plurality of detection terminals in the non-active region, first ends of the plurality of leading-out wires are electrically coupled to corresponding connection terminals and extending to the non-active region to be electrically coupled to corresponding detection terminals through second ends thereof.