Semiconductor Substrate Opening Layout for Uniform Display TFT Characteristics
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Solution Overview
Problem
Existing semiconductor substrates for display devices face challenges in achieving uniform characteristics due to non-uniformity in the manufacturing process, particularly in the formation of signal lines and connection electrodes, which can lead to variations in transistor performance and overall display quality.
Innovation Solution
The semiconductor substrate design incorporates an oxide semiconductor layer with specific insulating layer openings that allow for the connection of signal lines and connection electrodes without damaging the channel forming region, using a channel stopper transistor structure to maintain uniformity and reduce non-uniformity in characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the scanning line overlaps with signal lines, connection electrodes, and semiconductor layers, then the device structure is simplified and easier to manufacture, but characteristic non-uniformity occurs leading to non-uniform performance
Solution Approach 1:
The patent extracts the problematic overlapping region by introducing openings in the insulating layer that exclude the scanning line from contacting the semiconductor layers and connection electrodes. This separation removes the source of characteristic non-uniformity while preserving the overall simplified structure.
Solution Approach 2:
The patent applies local quality by creating openings only in specific regions where the scanning line would cause non-uniformity, rather than changing the entire structure. The insulating layer maintains its coverage in most areas but has localized openings to prevent harmful overlapping effects.
2Manufacturing precision
If openings are introduced in the insulating layer to reduce overlapping area, then characteristic uniformity is improved, but device complexity increases
Solution Approach 1:
The patent segments the insulating layer by introducing openings that divide it into regions with different functions. The insulating layer is segmented into areas that cover semiconductor layers and areas that exclude connection electrodes from scanning line contact, achieving uniformity through localized structural division.
Solution Approach 2:
The patent addresses the overlapping problem by introducing a vertical dimension through openings in the insulating layer, rather than changing the horizontal layout. This dimensional approach allows the scanning line to be excluded from harmful contacts while maintaining the planar simplicity of the overall device structure.
Data Source
AI summary
According to one embodiment, a semiconductor substrate, comprising, a first semiconductor layer and a second semiconductor layer that overlap a scanning line, an insulating layer that covers the first semiconductor layer and the second semiconductor layer, and a signal line, wherein the insulating layer has a first opening including a pair of long sides and a pair of short sides, the long sides of the first opening are parallel to the second direction, and the short sides of the first opening are parallel to the first direction, and the signal line is connected to the first semiconductor layer and the second semiconductor layer via the first opening.