Semiconductor Package Openings for Dam-Free Multi-Chip Stacking
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Solution Overview
Problem
In multi-chip semiconductor packages, the use of solder resist dams and underfill dispensing areas limits the efficient use of internal space due to the need for additional regions to prevent underfill bleeding, hindering the stacking of multiple chips and securing process margins.
Innovation Solution
A semiconductor package design featuring a package substrate with a first opening in the chip mounting region, where a first semiconductor chip is mounted, and multiple second semiconductor chips are stacked with a sealant filling the gap between the chips and the substrate, and a taping film covers the sealant, eliminating the need for additional space for underfill dispensing and solder resist dams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder resist dam and dispensing area are added to prevent underfill bleeding, then underfill containment is improved, but internal space utilization deteriorates
Solution Approach 1:
The patent removes the solder resist dam structure from the package design. Instead of using a separate dam structure to contain underfill, the underfill is directly dispensed onto the substrate and allowed to spread naturally to form the containment structure, eliminating the need for additional space-consuming dam structures
Solution Approach 2:
The patent merges the underfill dispensing area with the chip mounting region. The underfill is dispensed within the same area where the chip is mounted, combining two functions into one space rather than requiring separate dedicated areas for underfill application and chip mounting
2Ease of manufacture
If additional regions for underfill dispensing are provided, then underfill application is improved, but space for chip stacking deteriorates
Solution Approach 1:
The underfill material is dispensed in a liquid state and uses its own viscosity and surface tension properties to naturally spread and form the required containment structure without needing separate dispensing areas or additional manufacturing steps. The underfill serves both as the application medium and the final containment structure
3Reliability
If solder resist dam is added to prevent underfill overflow, then underfill control is improved, but process margin deteriorates
Solution Approach 1:
The patent changes the physical parameters of the underfill material, specifically its viscosity and surface tension characteristics, to control the spreading behavior. By adjusting these material parameters, the underfill can be controlled to spread to the desired extent without requiring mechanical constraints like solder resist dams, thereby maintaining process margins
Data Source
AI summary
A semiconductor package includes a package substrate extending in a first direction, the package substrate having at least one first opening in a chip mounting region of the package substrate; a first semiconductor chip mounted in the chip mounting region on an upper surface of the package substrate; a plurality of second semiconductor chips sequentially stacked on the upper surface of the package substrate and spaced apart from the first semiconductor chip in the first direction; a sealant covering the first semiconductor chip and the plurality of second semiconductor chips on the package substrate, the sealant filling a gap between the first semiconductor chip and the package substrate and filling an interior of the at least one first opening of the package substrate; and a taping film attached on a lower surface of the package substrate to cover at least a portion of the sealant exposed in the first opening.