Redistribution Substrate Package Layout for Thermal and Electrical Reliability
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving improved electrical, thermal, and mechanical properties, which are essential for enhancing the reliability and durability of electronic products.
Innovation Solution
A semiconductor package design incorporating a first and second redistribution substrate with a semiconductor chip in between, featuring a conductive structure with different materials for the first and second conductive structures, and a conductive seed pattern, along with a molding layer covering the semiconductor chip and conductive structures, to enhance electrical connectivity and structural stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor package structure is used with bonding wires and bumps, then the package can be manufactured with standard processes, but the electrical properties and reliability are limited
Solution Approach 1:
The package structure is divided into multiple redistribution substrates (first and second redistribution substrates) with distinct functional layers. Each substrate contains separate conductive structures (first conductive structure, second conductive structure) that are laterally spaced apart, allowing independent optimization of electrical pathways and improving overall reliability while maintaining manufacturability through modular assembly
Solution Approach 2:
The patent transitions from planar bonding wire connections to three-dimensional stacked conductive structures. The first and second conductive structures are arranged vertically with lateral spacing, creating multiple electrical pathways through the thickness direction. This dimensional change enables improved electrical properties without increasing lateral footprint, resolving the contradiction between reliability improvement and structural complexity
2Reliability
If the semiconductor chip thickness is increased to improve mechanical properties, then the package durability is enhanced, but the manufacturing process becomes more complex
Solution Approach 1:
The conductive structures are formed with predetermined geometries and lateral spacing before chip assembly. The first and second conductive structures are laterally spaced apart and positioned in advance on the redistribution substrates, allowing the semiconductor chip to be mounted with proper alignment without requiring complex post-assembly adjustments. This preliminary positioning simplifies the overall manufacturing process while enabling enhanced mechanical properties through increased chip thickness
Solution Approach 2:
The patent applies different materials to the first and second conductive structures, optimizing each layer for specific mechanical and electrical requirements. The first conductive structure uses one material composition while the second uses a different material, allowing localized property optimization that enhances overall package reliability without requiring uniform thickening of the entire chip structure, thus maintaining ease of manufacture
3Reliability
If different materials are used for first and second conductive structures, then electrical properties are optimized, but manufacturing precision requirements increase
Solution Approach 1:
The conductive system is segmented into distinct first and second conductive structures with lateral spacing between them. This segmentation allows separate material deposition processes for each structure, enabling optimization of electrical properties with different materials while maintaining manufacturing precision through independent process control. Each conductive structure can be fabricated with standard precision requirements rather than requiring ultra-precise multi-material integration
Solution Approach 2:
The patent introduces a molding layer as an intermediary element that covers and protects the conductive structures. The molding layer encapsulates the first and second conductive structures, providing mechanical support and isolation that reduces the precision requirements for material deposition. This intermediary protective layer allows greater tolerance in conductive structure fabrication while maintaining optimized electrical properties
4Temperature
If conductive structures are laterally spaced apart from the semiconductor chip, then thermal radiation is improved, but the electrical connection complexity increases
Solution Approach 1:
The patent resolves the thermal-electrical contradiction by transitioning to three-dimensional conductive structures with lateral spacing. The first and second conductive structures extend vertically with gaps between them, allowing thermal radiation in the lateral direction while maintaining electrical connectivity through the vertical dimension. This dimensional separation enables simultaneous optimization of thermal radiation and electrical connection without increasing overall complexity
Solution Approach 2:
The conductive structures serve multiple functions simultaneously: they provide electrical connection between redistribution substrates, enable thermal radiation through lateral spacing, and offer mechanical support. The first and second conductive structures with lateral spacing fulfill both electrical and thermal functions, reducing the need for separate components and thereby maintaining simplicity despite the multi-functional requirements
Data Source
AI summary
Disclosed is a semiconductor package comprising a first redistribution substrate; a solder ball on a bottom surface of the first redistribution substrate; a second redistribution substrate; a semiconductor chip between a top surface of the first redistribution substrate and a bottom surface of the second redistribution substrate; a conductive structure electrically connecting the first redistribution substrate and the second redistribution substrate, the conductive structure laterally spaced apart from the semiconductor chip and including a first conductive structure and a second conductive structure in direct contact with a top surface of the first conductive structure; and a conductive seed pattern between the first redistribution substrate and the first conductive structure. A material of first conductive structure and a material of the second conductive structure may be different from a material of the solder ball.