Substrate Feature Patterning With Multi-Step Etching for Line Width Control

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Solution Overview

Problem

Existing methods struggle to form optical and photonic devices with both small and large line widths on a substrate without inadvertently etching thinner features too much, leading to issues like line wiggle, line flop, line breaks, and line edge roughness.

Innovation Solution

A multi-step etching process is employed to form features with different line widths, involving a film stack on a substrate, including a hard mask layer, planarization layer, and silicon-containing layer, with precise control of trench formation and selective removal of layers to achieve desired widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single etching process is used to form features with different line widths, then the etching process can be simplified, but thinner features will be over-etched causing line wiggle, line flop, line breaks, and line edge roughness

Engineering Contradiction:
Improveetching process simplicityVSAvoidline width control precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the etching process into multiple sequential etching steps with different etching conditions. The first etching step uses a first etching condition to etch wider features, while the second etching step uses a second etching condition to etch narrower features. This segmentation allows each step to be optimized for specific feature width ranges, preventing over-etching of thinner features while maintaining process feasibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts etching parameters between steps. The etching conditions are changed from the first etching condition to the second etching condition based on the progression of the etching process and the specific features being etched. This dynamic adjustment allows the process to adapt to different feature geometries, preventing over-etching while maintaining etching effectiveness.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If multiple etching steps with different conditions are used to prevent over-etching, then line width precision is improved, but the etching process complexity increases

Engineering Contradiction:
Improveline width control precisionVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the etching process into distinct steps with clearly defined etching conditions. Each etching step targets specific feature width ranges, allowing for precise control of line widths. The segmentation is structured so that wider features are etched in the first step and narrower features are etched in subsequent steps, achieving precision without excessive complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes key etching parameters between steps, including etching chemistry, power, pressure, and temperature. These parameter changes are strategically selected to optimize etching for different feature widths. By systematically varying parameters, the patent achieves precise line width control while maintaining a manageable process structure that can be implemented with standard equipment.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively forms features with distinct line widths, preventing over-etching and maintaining structural integrity, thereby improving optical performance in devices like augmented and virtual reality devices.

Implementation Method 1

etching the silicon-containing layer to form trenches extending through the silicon-containing layer and to the planarization layer during a first etching process

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

removing the silicon-containing layer from the planarization layer during a fourth etching process or a polishing process

Methodology Applied
Scientific EffectPolishing: Abrasion

Data Source

PatentUS12374552B2Methods for preparing small features on a substrate
Publication Date: 2025.07.29 APPLIED MATERIALS INC
  • US12374552B2 patent drawing
  • US12374552B2 patent drawing
  • US12374552B2 patent drawing

AI summary

Embodiments of the present disclosure generally relate to methods for forming features having small and large line widths on the same substrate or device. In some embodiments, the methods described and discussed herein can be used to produce optical and photonic devices. These devices, including augmented reality (AR) devices and/or virtual reality (VR) devices, have desired pattern areas with different features and/or line widths to achieve the desired optical performance.