Package Substrate Pedestals for Deep Trench Capacitor Alignment

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Solution Overview

Problem

The thickness mismatch between deep trench capacitors and substrate cores in semiconductor packages leads to misalignment and processing challenges during embedding, causing misalignments and mechanical stress due to the use of adhesives and encapsulants.

Innovation Solution

A pedestal or spacer is used to fill the cavity and support the deep trench capacitor at a suitable height and location relative to the core, ensuring alignment and reducing mechanical stress by matching the thickness of the semiconductor component assembly to the cavity height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If deep trench capacitors are embedded directly in substrate cores, then manufacturing process is simplified, but thickness mismatch causes misalignment and mechanical stress

Engineering Contradiction:
Improveembedding process simplicityVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A pedestal structure is introduced as an intermediary component between the deep trench capacitor and the substrate core. The pedestal has a first surface that contacts the capacitor and a second surface that contacts the substrate core, acting as a mediator that bridges the thickness mismatch. This allows the capacitor to be positioned at the correct height while maintaining proper alignment with the substrate core, thereby resolving both the alignment precision issue and maintaining manufacturing simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If adhesives and encapsulants are used to compensate for thickness mismatch, then alignment can be achieved, but mechanical stress increases

Engineering Contradiction:
Improvealignment precisionVSAvoidmechanical stress
Core Design Contradiction:
Manufacturing precisionVSStress or pressure

Solution Approach 1:

The pedestal serves as a mechanical intermediary that provides a stable, stress-distributing interface between the capacitor and substrate core. By contactingly supporting the capacitor on its first surface and being supported by the substrate core on its second surface, the pedestal distributes mechanical loads more evenly than adhesives alone, reducing localized stress concentrations while maintaining alignment precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The pedestal changes the mechanical parameter of the assembly by providing a rigid support structure with appropriate mechanical properties. This structural parameter change reduces the reliance on adhesives for mechanical support, thereby reducing the mechanical stress and strain in the overall assembly while maintaining proper positioning.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If pedestal is used to match thickness, then alignment and mechanical stress are improved, but device complexity increases

Engineering Contradiction:
Improvealignment precisionVSAvoidassembly structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The pedestal is segmented into distinct functional surfaces: a first surface for contacting the deep trench capacitor and a second surface for contacting the substrate core. This segmentation allows each surface to be optimized for its specific function - the first surface provides stable support for the capacitor while the second surface provides proper interface with the substrate core, achieving alignment precision without excessive overall complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250218958A1Pedestals for semiconductor components embedded in package substrates and related methods
Publication Date: 2025.07.03 INTEL CORP
  • US20250218958A1 patent drawing
  • US20250218958A1 patent drawing
  • US20250218958A1 patent drawing

AI summary

Pedestals for semiconductors embedded in package substrates and related methods are disclosed. An example package substrate for an integrated circuit package disclosed herein includes core having a first surface, a second surface, and a cavity formed in the first surface, a semiconductor component disposed in the cavity, and a pedestal disposed in the cavity, the pedestal having a third surface coupled to the semiconductor component, and a fourth surface adjacent to the first surface, the pedestal dimensioned such that a first thickness of the pedestal and semiconductor is substantially equal to a second thickness of the core.