Semiconductor Substrate Plating with Sloped Resist Patterns
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Solution Overview
Problem
Conventional semiconductor package manufacturing methods face challenges in achieving uniformity and accuracy of metal and electrode layers, leading to inconsistent binding power and poor humidity resistance due to uncontrolled electrodeposition processes, which hinder miniaturization and adaptation to thinner packages.
Innovation Solution
A manufacturing method involving a resist layer forming step, lithographic exposure using a glass mask with specific transmission and light shielding areas, development to create a resist pattern with a slope shape, and plating to form metal layers with a side shape that decreases in circumference, ensuring a flat top surface and stable bonding, while allowing for miniaturization and improved humidity resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If electrodeposition is performed without control by resist pattern, then the process is simple, but the length of flared portions varies and binding power is inconsistent
Solution Approach 1:
The resist pattern is formed in advance with a predetermined pattern before electrodeposition, establishing the exact boundaries and dimensions of where metal should be deposited. This preliminary structuring ensures that the flared portions achieve uniform length and consistent binding power, resolving the precision issue while maintaining process simplicity.
2Productivity
If electrodeposition is performed without control by resist pattern, then the process is fast, but the top surface becomes uneven and bonding wire connection is poor
Solution Approach 1:
The resist pattern is formed beforehand with precise geometric definitions, creating a mold that guides the electrodeposition process. This preliminary structuring ensures that metal is deposited only where needed, achieving both rapid production and a flat, uniform top surface suitable for bonding wire connection.
3Volume of moving object
If the size of electrode layer is reduced for miniaturization, then the package can be smaller, but controlling the size with high accuracy becomes difficult
Solution Approach 1:
The resist pattern is formed in advance with the exact miniaturized dimensions required, serving as a precise template that guides electrodeposition. This preliminary structuring enables accurate control of electrode layer size even at miniaturized scales, allowing package size reduction while maintaining manufacturing precision.
Solution Approach 2:
The resist pattern is designed with specific local geometric features that define the exact boundaries of miniaturized electrode layers. This localized precision ensures that each electrode layer achieves the required size accuracy for miniaturized packages, with the resist pattern's geometry directly controlling the metal deposition dimensions.
4Strength
If flared portion length is increased to improve binding power, then the metal layer bonds better to resin, but the necessary thickness increases and package cannot be thinner
Solution Approach 1:
The resist pattern is formed in advance with optimized dimensions that provide the minimum necessary flared portion length for adequate binding power. This preliminary structuring ensures that the metal layer achieves sufficient bonding strength to resin while keeping the thickness minimal, enabling thinner package designs without sacrificing connection strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves uniform metal and electrode layers with enhanced bonding strength, improved humidity resistance, and adaptability to miniaturization, ensuring reliable semiconductor package production.
Implementation Method 1
lithographic exposure using a glass mask with specific transmission and light shielding areas, development to create a resist pattern with a slope shape
Implementation Method 2
plating to form metal layers with a side shape that decreases in circumference
Data Source
AI summary
A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.