Substrate Support Pressure Pulsing for Wafer Warpage Reduction

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Solution Overview

Problem

As the number of vertically stacked memory cells in 3D NAND devices increases, stress within the stacked memory cells increases, leading to substrate bow and various substrate processing issues such as wafer breakage and lithography and patterning issues.

Innovation Solution

A processing system and method that includes a substrate support assembly with a backside gas cavity, a vacuum source, and a backside gas resource, which delivers alternating series of vacuum pressure pulses and backside gas pulses to reduce substrate warpage by applying alternating upward and downward forces on the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of vertically stacked memory cells in 3D NAND devices is increased to achieve higher density, then memory capacity is improved, but substrate stress increases leading to substrate warpage and processing issues

Engineering Contradiction:
Improvememory capacityVSAvoidsubstrate flatness
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent applies preliminary anti-action by introducing a compensation layer with opposite stress characteristics before the substrate warpage fully develops. This compensation layer pre-counters the intrinsic stress from stacked memory cells, preventing severe warpage before it occurs during subsequent processing steps.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent changes physical parameters by controlling the thickness, material composition, and stress characteristics of the compensation layer. By adjusting these parameters, the system optimizes stress compensation while maintaining substrate flatness throughout the fabrication process.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the number of vertically stacked memory cells is increased, then memory capacity is improved, but substrate stress causes wafer breakage and lithography issues

Engineering Contradiction:
Improvememory capacityVSAvoidsubstrate processing reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The compensation layer serves as a beforehand cushioning mechanism that absorbs and counteracts stress from vertically stacked memory cells. This protective layer prevents substrate failure during dicing, bonding, and packaging operations by maintaining structural integrity throughout the fabrication process.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Manufacturing precision

If substrate warpage is reduced through compensation layers, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvesubstrate flatnessVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The compensation layer is strategically positioned only in specific regions where stress compensation is most needed. By applying local quality, the patent reduces substrate warpage in critical areas without uniformly increasing complexity across the entire device structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces substrate warpage, improving substrate flatness and reducing processing issues such as wafer breakage and patterning errors, thereby enhancing the accuracy of device pattern formation and overall production yield.

Implementation Method 1

delivering, by use of the vacuum source, of a series of vacuum pressure pulses to at least the backside gas cavity

Methodology Applied
Scientific EffectVacuum pressure: Vacuum

Implementation Method 2

delivering, by use of the backside gas resource, of a series of backside gas pulses to the backside gas cavity

Methodology Applied
Scientific EffectGas pressure: Pressure Increase

Implementation Method 3

delivering, by use of the power source, of electrical power to the heater of the substrate support assembly, wherein the delivering of electrical power generates a temperature above ambient temperature at the substrate support surface

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS20250183091A1Substrate warpage reduction
Publication Date: 2025.06.05 APPLIED MATERIALS INC
  • US20250183091A1 patent drawing
  • US20250183091A1 patent drawing
  • US20250183091A1 patent drawing

AI summary

Embodiments disclosed herein include a processing system. The processing system includes a processing chamber, a processing volume; a substrate support assembly including a substrate support surface, a backside gas cavity, and a heater. The system includes a vacuum source in communication with the processing volume and the backside gas cavity. The system includes a backside gas resource in communication with the backside gas cavity. The system includes a controller, and the computer-readable instructions when executed by a processor of the controller cause: a delivery of electrical power to the heater of the substrate support assembly, a delivery of a series of vacuum pressure pulses the backside gas cavity, and a delivery of a series of backside gas pulses to the backside gas cavity where the series of vacuum pressure pulses and the series of backside gas pulses are alternately provided.