Semiconductor Substrate Protrusion Recess Stress Distribution

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Solution Overview

Problem

Power semiconductor module arrangements face issues with cracks in solder connections due to differing coefficients of thermal expansion and production tolerances, leading to mechanical and electrical connection failures.

Innovation Solution

A substrate arrangement with a dielectric insulation layer, a first metallization layer featuring protrusions or recesses, and a connection layer that covers these features, with a hollow rivet positioned between the connection layer and the metallization layer, redistributes stress and reduces thermal expansion mismatch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a solder connection is used to attach the substrate to the hollow rivet, then electrical connection is achieved, but cracks form due to CTE mismatch between different materials

Engineering Contradiction:
Improveconnection reliabilityVSAvoidsolder connection strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent introduces a connection layer as an intermediary component between the substrate and hollow rivet. This connection layer has a CTE that is intermediate between the substrate and hollow rivet, acting as a buffer to reduce thermal stress. The connection layer includes protrusions that extend into recesses of the substrate, creating a mechanical interlock that distributes stress more evenly across the joint, preventing crack formation in the solder connection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a composite structure consisting of multiple materials with different CTEs arranged in a specific configuration. The connection layer is made of a material that is neither too rigid nor too soft, combining properties that allow it to accommodate thermal expansion differences while maintaining mechanical strength. This composite approach creates a gradient of CTE values from the substrate through the connection layer to the hollow rivet, reducing overall thermal stress in the assembly.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If traditional flat metallization layer is used, then simple manufacturing is achieved, but stress concentration occurs during thermal cycling

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidthermal cycle reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by creating protrusions in the connection layer at specific locations where stress concentration is most likely to occur. These protrusions extend into corresponding recesses in the substrate, providing localized reinforcement and stress distribution exactly where needed. This allows the majority of the metallization layer to remain simple and easy to manufacture, while only specific critical areas have the enhanced protrusion structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the mechanical and electrical reliability of the substrate arrangement by reducing the likelihood of cracks and improving the performance and reliability of power semiconductor modules.

Implementation Method 1

The at least one substrate, the solder connection, and the sleeve, hollow rivet or hollow bushing usually have different CTEs (coefficients of thermal expansion). When heat is generated during the operation of the semiconductor arrangement, and when the different components subsequently cool down again, the difference between the CTEs of the different materials (e.g., copper, aluminum, solder) may result in unwanted cracks in the solder connection.

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentEP3951866A1Semiconductor substrate arrangement and method for producing the same
Publication Date: 2022.02.09 INFINEON TECHNOLOGIES AG
  • EP3951866A1 patent drawingFigure 1~3
  • EP3951866A1 patent drawingFigure 4A~8B
  • EP3951866A1 patent drawingFigure 9~12

AI summary

A substrate arrangement comprises a substrate comprising a dielectric insulation layer and a first metallization layer attached to the dielectric insulation layer, a connection layer arranged on the first metallization layer, and a hollow rivet, wherein the first metallization layer comprises at least one protrusion and/or at least one recess, the connection layer at least partly covers the at least one protrusion and/or the at least one recess, the hollow rivet is arranged on the connection layer such that the connection layer is arranged between the hollow rivet and the first metallization layer, and between the hollow rivet and the at least one protrusion and/or the at least one recess.