Connection Substrate Recess for Under-Fill Crack-Resistant Packaging

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Solution Overview

Problem

The fabrication of chip-on-wafer (CoW) structures for semiconductor packages often results in stresses that lead to cracks in the under-fill layer, compromising the reliability of the package.

Innovation Solution

A semiconductor package design that includes a package substrate, a connection substrate with a recession on its lower corner, a semiconductor chip on the connection substrate, and connection terminals connecting the package substrate to the connection substrate, with under-fill layers filling gaps between the chips and the connection substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a chip-on-wafer (CoW) structure is fabricated with multiple dies on a silicon interposer, then interconnect density is improved, but stress concentration causes cracks in the under-fill layer

Engineering Contradiction:
Improveinterconnect densityVSAvoidunder-fill layer integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent introduces asymmetry by forming a recess at the lower corner of the connection substrate. This asymmetric structural modification redistributes the stress that would otherwise concentrate at the corner, preventing crack initiation in the under-fill layer while maintaining the high interconnect density of the CoW structure

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The recess is formed in advance during substrate processing, before under-fill material is applied. This pre-formed structural feature acts as a stress buffer that cushions against the thermal and mechanical stresses that develop during subsequent packaging and operation, preventing under-fill layer failure

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If under-fill layer volume is increased to fill gaps between chips and connection substrate, then reliability is improved, but material protrusion from substrate sidewall occurs

Engineering Contradiction:
Improvepackage reliabilityVSAvoidsubstrate sidewall profile
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The recess creates a localized region with different geometric properties at the lower corner of the connection substrate. This local structural modification allows the under-fill material to be contained within the recess boundaries, enabling sufficient fill volume for reliability without causing unwanted protrusion from the overall substrate sidewall

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The recess introduces a vertical dimension constraint by creating a stepped structure. This dimensional change provides a physical boundary that confines the under-fill material in the vertical direction at the corner region, preventing lateral protrusion while still allowing adequate material volume for gap filling

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250062248A1Semiconductor package
Publication Date: 2025.02.20 SAMSUNG ELECTRONICS CO LTD
  • US20250062248A1 patent drawing
  • US20250062248A1 patent drawing
  • US20250062248A1 patent drawing

AI summary

A semiconductor package including a package substrate, a connection substrate on the package substrate and having on a lower corner of the connection substrate a recession that faces a top surface of the package substrate, a semiconductor chip on the connection substrate, a plurality of first connection terminals connecting the connection substrate to the semiconductor chip, and a plurality of second connection terminals connecting the package substrate to the connection substrate. The recession is laterally spaced apart from the second connection terminals.