Substrate Reference Patterns for Cavity Alignment

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Solution Overview

Problem

The challenge in manufacturing substrates with built-in components is the low positional accuracy of cavities formed by laser processing, which leads to misalignment of electronic components, necessitating complex alignment mark measurements to ensure accurate positioning.

Innovation Solution

Incorporating reference patterns on the wiring layers that cross the side surfaces of both the electronic components and cavities, allowing for easy verification of positional accuracy through slits and V-shaped patterns, facilitating precise alignment and mounting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If laser processing is used to form cavities, then manufacturing flexibility is improved, but positional accuracy deteriorates

Engineering Contradiction:
Improvemanufacturing flexibilityVSAvoidpositional accuracy of cavity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces reference patterns as an intermediary element between the laser processing system and the final cavity structure. These patterns serve as mediators that enable alignment verification, allowing the laser processing to maintain its manufacturing flexibility while achieving improved positional accuracy through the reference framework provided by the patterns.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If photolithography is used to form wiring patterns, then positional accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvepositional accuracy of wiring patternVSAvoidalignment mark measurement complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts the alignment verification function from the complex measurement process and embeds it directly into the wiring layer through reference patterns. By taking out the alignment marks and integrating them into the wiring structure itself, the patent eliminates the need for separate alignment mark measurements, thereby reducing device complexity while maintaining high positional accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If alignment marks are measured after component mounting, then positional accuracy verification is achieved, but manufacturing time increases

Engineering Contradiction:
Improvepositional accuracy verificationVSAvoidmanufacturing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements preliminary action by forming reference patterns during the wiring layer fabrication process, before component mounting occurs. This allows the alignment verification framework to be established in advance, enabling quick and easy positional accuracy checks after component mounting without requiring complex post-assembly measurement procedures, thereby reducing manufacturing time.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables straightforward and accurate verification of the positional relationship between the cavity and electronic components, enhancing manufacturing efficiency and reducing errors in alignment.

Implementation Method 1

a cavity is formed by irradiating an insulating layer with laser light using a laser processor

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS11158583B2Substrate with built-in component
Publication Date: 2021.10.26 SHINKO ELECTRIC IND CO LTD
  • US11158583B2 patent drawing
  • US11158583B2 patent drawing
  • US11158583B2 patent drawing

AI summary

A substrate with built-in component includes: a first wiring layer having at least one reference pattern; a first insulating layer formed on the first wiring layer; and an electronic component mounted, in a cavity formed in the first insulating layer, on the first wiring layer, wherein the at least one reference pattern includes at least one first portion crossing a side surface of the electronic component in plan view, and at least one second portion crossing a side surface of the cavity in plan view.