Multi-layer Circuit Substrate with Reference Plane Voids for Signal Integrity

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Solution Overview

Problem

High-density integrated circuit substrates face challenges in maintaining signal integrity and impedance matching due to large-diameter vias that limit signal routing channels and cause signal degradation, as they require signal conductors to be routed around and isolated from these vias, reducing the number of available routing channels.

Innovation Solution

A multi-layer substrate design with a core having large diameter vias and signal conductors connected via small diameter portions through insulating layers, featuring a transmission line reference plane metal layer with voids larger than the vias to minimize insertion capacitance and increase routing channels, while maintaining impedance matching by routing signal conductors over these voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large diameter vias are used to pass through the core, then manufacturing reliability is improved, but the number of signal routing channels is reduced

Engineering Contradiction:
Improvemanufacturing reliabilityVSAvoidnumber of signal routing channels
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The via structure is segmented into two distinct types: large-diameter vias for power/ground distribution and small-diameter vias for signal routing. This segmentation allows each via type to be optimized for its specific function, resolving the contradiction between manufacturing reliability (large vias) and routing flexibility (small vias)

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different via diameters are used in different locations based on functional requirements. Large-diameter vias are strategically placed for power and ground distribution where mechanical strength and manufacturing reliability are critical, while small-diameter vias are used for signal routing where space efficiency and routing density are paramount

Inventive Principle:
Principle #3Local quality

2Reliability

If large diameter vias are used for power distribution, then electrical performance is improved, but transmission line impedance control is degraded

Engineering Contradiction:
Improveelectrical performanceVSAvoidimpedance control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A transmission line reference plane metal layer is introduced as an intermediary between the large-diameter power/ground vias and the signal conductors. This reference plane acts as a mediator that maintains consistent impedance for signal transmission lines by providing a stable reference, while allowing large vias to be used for power distribution without degrading signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If signal conductors are routed around large diameter vias, then signal integrity is maintained, but routing density is reduced

Engineering Contradiction:
Improvesignal integrityVSAvoidrouting density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The via system is segmented into large-diameter vias for power/ground and small-diameter vias for signals. Small-diameter vias can be closely spaced and routed directly beneath signal conductors, enabling high routing density while maintaining signal integrity through proper transmission line design

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7646082B2Multi-layer circuit substrate and method having improved transmission line integrity and increased routing density
Publication Date: 2010.01.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US7646082B2 patent drawing
  • US7646082B2 patent drawing
  • US7646082B2 patent drawing

AI summary

A multi-layer circuit substrate and method having improved transmission line integrity and increased routing density uses a selectively applied transmission line reference plane metal layer to achieve signal path shielding and isolation, while avoiding drops in impedance due to capacitance between large diameter vias and the transmission line reference plane metal layer. The transmission line reference plane defines voids above (or below) the signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. For voltage-plane bearing PTHs, no voids are introduced, so that signal path conductors can be routed above or adjacent to the voltage-plane bearing PTHs, with the transmission line reference plane preventing shunt capacitance between the signal path conductors and the PTHs.