Semiconductor Substrate Reuse Using Porous Wafer Separation
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Solution Overview
Problem
The high cost of silicon carbide wafers for semiconductor devices is a significant contributor to overall production costs, and existing methods do not effectively reduce material losses during manufacturing.
Innovation Solution
A method involving the formation of one or more epitaxial layers and porous layers on a semiconductor wafer, allowing for the separation of a non-porous wafer part from the remainder of the substrate along the porous layers, enabling the reuse of the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon carbide wafer is used for growing semiconductor devices, then high-quality epitaxial layers can be formed, but the wafer cost becomes significantly high
Solution Approach 1:
The substrate is divided into two functional parts: a reusable silicon carbide wafer base and a disposable epitaxial layer stack with porous separation layers. The porous layers act as segmentation interfaces that allow clean separation after device fabrication, enabling the expensive wafer base to be reused while the consumed epitaxial materials are discarded.
Solution Approach 2:
The patent implements a recover and reuse cycle where the silicon carbide wafer is recovered after device fabrication by separating it from the epitaxial layers through the porous separation layers. The recovered wafer is then prepared for reuse, while the epitaxial layers containing the fabricated devices are discarded, thus recovering the high-value wafer substrate.
2Loss of substance
If the wafer is used multiple times to reduce costs, then material loss is reduced, but the complexity of the manufacturing process increases
Solution Approach 1:
Porous separation layers are formed within the epitaxial structure before device fabrication. These pre-positioned porous layers serve as predetermined separation planes that simplify the subsequent wafer recovery process, making the reuse cycle more manageable despite the added initial processing steps.
Solution Approach 2:
Porous semiconductor layers are integrated into the epitaxial structure to provide controlled separation planes. The porous nature of these layers enables easy separation between the reusable wafer base and the disposable epitaxial layers after device fabrication, facilitating wafer reuse while managing process complexity.
3Adaptability or versatility
If porous layers are formed in the substrate to enable separation, then wafer reuse becomes possible, but the manufacturing precision requirements increase
Solution Approach 1:
The porous separation layers are formed at predetermined positions within the epitaxial structure before device fabrication. This preliminary positioning ensures that separation will occur at the correct interface between the reusable wafer and the disposable epitaxial layers, maintaining manufacturing precision while enabling reuse.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces wafer costs by allowing multiple uses of a semiconductor wafer and minimizing material losses during manufacturing, thereby providing a competitive advantage.
Implementation Method 1
forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers
Data Source
AI summary
pa The method of processing a semiconductor wafer includes forming one or more epitaxial layers over its first main surface. It also involves forming one or more porous layers within the semiconductor wafer or within the epitaxial layers. Together, the semiconductor wafer, the epitaxial layer(s), and the porous layer(s) form a substrate. Next, doped regions of a semiconductor device are formed within the epitaxial layer(s). After forming these doped regions, a non-porous part of the semiconductor wafer is separated from the rest of the substrate along the porous layer(s).