Semiconductor Substrate Sidewall Protection During Planarization
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Solution Overview
Problem
Challenges in 3DICs include substrate damage during planarization processes, which reduces available area and yield, and there is a need for improved integration and protection of semiconductor dies in stacked configurations.
Innovation Solution
Forming a dielectric material on the sidewall of a substrate to protect it during planarization, thereby reducing damage and increasing available area and yield, and using through-silicon vias for electrical connectivity between stacked semiconductor dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If planarization process is performed on substrate, then surface flatness is improved, but substrate sidewall damage occurs reducing available area and yield
Solution Approach 1:
A dielectric material is formed on the substrate sidewall before the planarization process to provide protective coverage. This preliminary protective action prevents damage during subsequent planarization operations, allowing the substrate to maintain both surface flatness and sidewall integrity, thereby preserving available area and yield.
Solution Approach 2:
The dielectric material serves as an intermediary protective layer between the substrate sidewall and the planarization process. This intermediate layer absorbs or distributes mechanical stresses during planarization, preventing direct damage to the substrate sidewall while allowing the planarization to proceed and achieve the desired surface flatness.
2Productivity
If multiple semiconductor dies are stacked to increase integration density, then integration density and bandwidth are improved, but substrate damage during processing increases
Solution Approach 1:
The dielectric material is deposited on substrate sidewalls before stacking operations to establish protective coverage in advance. This preliminary protection remains in place during subsequent stacking and processing steps, preventing damage accumulation that would otherwise occur with multiple handling and planarization operations required for 3DIC assembly.
Solution Approach 2:
The dielectric layer acts as a cushioning layer deposited beforehand on substrate sidewalls. This cushioning protection is particularly important for edge dies in stacked configurations, which are more vulnerable to damage during assembly. The dielectric material absorbs mechanical impacts and stresses, preserving substrate reliability throughout the stacking process.
Data Source
AI summary
A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.