Semiconductor Packaging Substrate Photosensitive Support Structure Alignment
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Solution Overview
Problem
Existing semiconductor packaging substrates face challenges in achieving precise alignment of openings, leading to errors in electrical testing and increased fabrication costs due to misalignment and scrapping of normal semiconductor chips with defective substrates.
Innovation Solution
A semiconductor packaging substrate with a supporting structure made of photosensitive insulating material, featuring through holes for exposing conductive posts, allowing for precise alignment and electrical testing before packaging, and a method involving a carrier, circuit layers, conductive posts, and insulating layers to form a thinned circuit structure with temporary rigidity support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a supporting member made of insulating board, semiconductor board or metal board is used, then the packaging substrate can be formed, but the alignment error of the openings is too great
Solution Approach 1:
The patent changes the material parameter of the supporting member from traditional insulating board/semiconductor board/metal board to photosensitive material. This material parameter change enables precise opening formation through photolithography, reducing alignment error from micrometer level to sub-micrometer level, thereby resolving the contradiction between reliability and manufacturing precision.
Solution Approach 2:
The patent replaces the mechanical drilling or punching method for forming openings with a photolithography-based chemical etching process. This substitution eliminates mechanical alignment errors and achieves higher precision through optical patterning, directly addressing the alignment precision problem while maintaining structural integrity.
2Ease of manufacture
If the supporting member is an insulating board, it is not easy to form the openings
Solution Approach 1:
The patent changes the material parameter of the supporting member to photosensitive material, which can be easily patterned through standard photolithography processes. This enables simple and precise opening formation by exposing the photosensitive material to light through a mask, making the manufacturing process both easy and precise simultaneously.
3Reliability
If the alignment error is great, then the test probe may be easily inserted into a wrong opening and miscontact the circuit layer
Solution Approach 1:
The patent changes the material to photosensitive material, enabling sub-micrometer alignment precision through photolithography. This precision ensures that test probe openings are accurately positioned, preventing miscontact errors and improving electrical test reliability by eliminating the harmful effect of alignment-induced miscontact.
4Productivity
If a normal semiconductor chip is disposed on a defective packaging substrate, then the normal semiconductor chip is scrapped along with the defective packaging substrate
Solution Approach 1:
The patent performs preliminary electrical testing on the packaging substrate before mounting semiconductor chips. By using precisely aligned openings formed through photolithography, the test accurately identifies defective substrates, allowing only good substrates to proceed to chip mounting. This preliminary action prevents normal chips from being wasted on defective substrates, improving both productivity and reducing material loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces alignment errors, prevents defective substrates from being used in packaging, minimizes the loss of normal electronic elements, and lowers fabrication costs by enabling precise electrical testing and using standard packaging equipment.
Implementation Method 1
the supporting structure is made of a photosensitive insulating material
Data Source
AI summary
A semiconductor packaging substrate is provided and includes: an insulating layer, a thinned circuit structure formed of circuit layers and conductive posts stacked on one another embedding in the insulating layer, and a supporting structure formed on the insulating layer and having at least one through hole exposing the conductive posts. As such, before a subsequent packaging operation, the packaging substrate can be electrically tested and screened so as to prevent a defective packaging substrate from being misused in the subsequent packaging operation and hence avoid the loss of normal electronic elements. A method for fabricating a semiconductor packaging substrate and a packaging process using the semiconductor packaging substrate are also provided.


