Multi-Layer Substrate Surface Finish Structure for Flip-Chip Bonding
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Solution Overview
Problem
Conventional multi-layer substrate surface finish structures face issues with unexpected expansion of pad and protective metal layers, leading to poor control over their sizes and causing height differences with dielectric layers, which result in air bubbles during flip-chip bonding and compromised electrical contact.
Innovation Solution
A surface finish structure where the protective metal layer only covers the upper surface of the pad layer, without external expansion, ensuring no height difference with the dielectric layer, thus preventing air bubble formation and maintaining package adhesion and electrical contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pad layer and protective metal layer are formed by electroplating or electroless plating method, then the layers are formed with good adhesion and conductivity, but the layers expand laterally from the seed layer causing poor size control
Solution Approach 1:
The patent segments the protective metal layer formation into two distinct stages: first forming an initial protective metal layer that covers the pad layer, then forming a second protective metal layer that covers the first layer. This segmentation allows better control over the final dimensions while maintaining the adhesion and conductivity benefits of electroplating/electroless plating methods.
Solution Approach 2:
The patent performs preliminary actions by first forming the pad layer with controlled dimensions, then forming the initial protective metal layer that precisely covers the pad layer boundaries before forming the second protective metal layer. This preliminary structuring prevents unwanted lateral expansion and ensures precise size control throughout the manufacturing process.
2Reliability
If the protective metal layer is formed to cover the pad layer completely, then the pad layer is protected from oxidation and contamination, but height difference is created causing air bubbles during flip-chip bonding
Solution Approach 1:
The patent applies local quality by forming the second protective metal layer with different properties than the first layer. The second layer is designed to be thinner and have different material composition to reduce height difference while maintaining the protective function against oxidation and contamination. This localized differentiation solves both protection and bonding issues.
Solution Approach 2:
The patent uses composite materials by combining different metal layers with distinct properties. The first protective metal layer provides strong adhesion and initial protection, while the second protective metal layer provides enhanced protection with reduced height profile. This composite structure achieves both oxidation/contamination protection and compatibility with flip-chip bonding processes.
3Ease of manufacture
If the photoresist layer is removed after seed layer formation, then the manufacturing process is simplified, but the pad layer cannot be properly formed
Solution Approach 1:
The patent performs preliminary actions by removing the photoresist layer immediately after seed layer formation, before pad layer formation begins. This preliminary removal simplifies the manufacturing process by eliminating the need to remove photoresist after pad layer formation, while the pad layer is subsequently formed using the exposed seed layer as a template.
Solution Approach 2:
The patent inverts the conventional sequence by removing the photoresist layer before pad layer formation rather than after. This inversion allows the pad layer to be formed directly on the exposed seed layer, ensuring proper pad layer formation while simplifying the overall manufacturing process by eliminating subsequent photoresist removal steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for precise control over pad and protective metal layer sizes, preventing air bubbles and ensuring reliable electrical contact and adhesion during flip-chip bonding, crucial for high-end semiconductor packaging.
Implementation Method 1
the electrically conductive seed layer 102 is formed on a bottom of the groove 110 by a sputtering method or an evaporation method
Implementation Method 2
the electrically conductive seed layer 102 is formed on a bottom of the groove 110 by a sputtering method or an evaporation method
Implementation Method 3
The pad layer 104 grows up upwardly and laterally based on the center of the electrically conductive seed layer 102 by an electroplating method or an electroless plating method
Implementation Method 4
The pad layer 104 grows up upwardly and laterally based on the center of the electrically conductive seed layer 102 by an electroplating method or an electroless plating method
Implementation Method 5
The protective metal layer 106 is formed, by an electroplating method or an electroless plating method, on the pad layer 104 to cover the pad layer 104 totally
Data Source
AI summary
A surface finish structure of a multi-layer substrate includes: a dielectric layer; at least one pad layer formed in the dielectric layer; and at least one protective metal layer formed on the at least one pad layer and bonded to the at least one pad layer, wherein the at least one protective metal layer only covers an upper surface of the at least one pad layer, the at least one protective metal layer is configured to be soldered to or contact an external element, and there is no height difference between an upper surface of the at least one protective metal layer and an upper surface of the dielectric layer.