Semiconductor Substrate Test Pads for Bump Bond Failure Detection
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Solution Overview
Problem
Existing semiconductor packages face challenges in detecting electrical connection failures between semiconductor chips and substrates, particularly due to non-bonded bumps and pads, which can lead to operational issues, and current non-destructive detection methods are not fully effective.
Innovation Solution
A semiconductor substrate design featuring a bump pad unit with a main bump pad and side bump pads on its upper surface, connected to test pads via traces, allowing for electrical connection detection using a test signal, enabling the identification of bonding failures and misalignments between the chip and substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If non-destructive detection means such as X-rays are used to identify connection failures, then detection capability is improved, but detection precision and reliability are insufficient
Solution Approach 1:
The patent applies preliminary action by pre-configuring test pads and traces on the substrate before the actual bonding process. This allows electrical connection testing to be performed after bump bonding, enabling detection of connection failures that non-destructive methods like X-rays cannot reliably identify. The test circuit is built in advance to facilitate subsequent electrical verification.
Solution Approach 2:
The patent replaces non-destructive physical detection methods (X-rays) with electrical detection methods. Instead of using imaging technology to infer connection status, the invention directly measures electrical continuity through test pads and traces, providing more reliable and precise detection of bonding failures.
2Reliability
If bumps and pads are bonded to achieve electrical connection, then electrical connectivity is improved, but connection failures occur due to misalignment or bonding issues
Solution Approach 1:
The patent implements preliminary action by creating test circuits with test pads and traces on the substrate before bump bonding. This pre-configured test infrastructure enables post-bonding electrical verification, allowing detection and identification of connection failures that occur due to misalignment or bonding issues, thereby improving overall connection reliability.
Solution Approach 2:
The patent applies feedback by using electrical connection test results to verify bonding quality. The test circuit provides feedback information about whether bumps are properly connected to pads, enabling identification of bonding failures and allowing for process correction or rejection of defective units.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables reliable detection of electrical connection failures and misalignments, ensuring proper bonding and alignment, thereby ensuring the semiconductor package operates correctly and reducing the risk of connection-related failures.
Implementation Method 1
traces configured to connect the bump pad unit and the test pads
Data Source
AI summary
A semiconductor substrate including an upper surface and a lower surface may include a bump pad unit disposed on the upper surface. The semiconductor substrate may also include test pads disposed on the upper surface or the lower surface. The semiconductor substrate may also include traces configured to connect the bump pad unit and the test pads. The bump pad unit includes a main bump pad disposed on the upper surface, and a plurality of side bump pads disposed on the upper surface to be spaced apart from the main bump pad. The traces may connect the main bump pad and the plurality of side bump pads to the test pads in a one-to-one manner.