Semiconductor Substrate Thinning Using Cavity-Guided Anisotropic Etching
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Solution Overview
Problem
The extreme thinning of semiconductor substrates from the backside is challenging due to intrinsic thickness variations and the risk of damaging active devices during the grinding and polishing processes.
Innovation Solution
A method involving the formation of dielectric-filled cavities on the substrate, followed by anisotropic etching that stops on crystallographic planes or dielectric material, allowing for thinning close to the device layer without an etch stop layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If grinding and polishing techniques are used to thin the substrate from the backside, then the substrate thickness can be reduced, but the intrinsic thickness variations (TTV) cause the thinning process to become uncontrolled at extremely low thickness values, risking damage to active devices
Solution Approach 1:
The patent introduces an etch stop layer (oxide layer or epitaxially grown SiGe layer) as an intermediary between the bulk silicon substrate and the active devices. This intermediary layer provides a controlled stopping point for the thinning process, preventing uncontrolled removal of substrate material that would otherwise occur due to TTV variations in grinding and polishing. The etch stop layer acts as a mediator that enables precise thickness control while protecting the active devices.
Solution Approach 2:
The patent changes the material parameter of the substrate by introducing layers with different etch rates (oxide layer or SiGe layer) compared to the bulk silicon. This parameter change allows the thinning process to be controlled through selective etching rather than mechanical grinding and polishing, enabling precise thickness control at extremely low values without being affected by TTV variations.
2Manufacturing precision
If an etch stop layer (oxide layer or epitaxially grown SiGe layer) is introduced to control the thinning process, then manufacturing precision is improved, but the device complexity and fabrication cost increase
Solution Approach 1:
The patent makes the existing dielectric-filled cavities (such as shallow trench isolation regions) serve a dual function: their primary function of electrical isolation and their secondary function as etch stop structures for controlling substrate thinning. By making the cavities deeper and filling them with dielectric material, they provide both isolation functionality and thickness control during the thinning process, eliminating the need for separate etch stop layers.
Solution Approach 2:
The patent merges the function of dielectric-filled cavities (isolation) with the function of etch stop layers (thickness control) into a single structural element. The deep dielectric-filled cavities simultaneously provide electrical isolation between devices and serve as the stopping point for the anisotropic etching process, thereby combining multiple functions into one feature and simplifying the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables thinning of the substrate to extremely low thicknesses without risking damage to active devices, simplifying semiconductor process sequences and reducing costs.
Implementation Method 1
an anisotropic etch is performed for removing additional material of the first substrate... the anisotropic etch is stopped by a crystallographic plane of the substrate material
Data Source
Figure 1a~1c
Figure 2~4
Figure 5~7
AI summary
A first crystalline semiconductor substrate (1) is provided and a layer (20) of semiconductor devices is produced on the front side thereof, in regions separated by dielectric-filled cavities (14), formed prior to the device processing. Additional layers (21) such as the layers of a multilayer interconnect structure are formed on the device layer. The substrate is then flipped and bonded face down to a second substrate (23), following by the thinning of the crystalline first substrate from the back side. The thinning proceeds as far as possible without removing the full thickness of the first substrate anywhere across its surface, i.e. taking into account any intrinsic thickness variation of the first and second substrates. After this, an anisotropic etch is performed for removing additional material of the first substrate (1). In accordance with the invention, the in-plane dimensions of the device regions separated by the dielectric-filled cavities (14) are configured so that the anisotropic etch is stopped by a crystallographic plane of the substrate material or by the dielectric material in said cavities (14), before it can reach said devices on the front side.