Semiconductor Substrate Thinning With a Polishing Stop Structure

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Solution Overview

Problem

The high cost of silicon-on-insulator (SOI) substrates used in semiconductor manufacturing is a significant challenge, as the existing wafer backside grinding process relies on expensive SOI substrates and lacks an efficient method to reduce manufacturing costs.

Innovation Solution

A method is introduced that involves forming trenches in a substrate with a polishing stop structure at the bottom, filling the trenches with a gap-filling material layer, and then using a chemical mechanical polishing process to expose the polishing stop structure, which allows for the formation of U-shaped recesses and subsequent filling with an insulating layer, thereby reducing substrate thickness and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If expensive SOI substrates are used for wafer backside grinding, then the substrate can be thinned effectively with the buried oxide layer as grinding stop layer, but the manufacturing cost increases significantly

Engineering Contradiction:
Improvesubstrate thinning precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces expensive SOI substrates with standard silicon substrates that have a sacrificial polysilicon layer. The polysilicon layer serves as a disposable grinding stop layer that can be removed after thinning, eliminating the need for costly SOI substrates while maintaining precise substrate thinning capability

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the material parameter of the stop layer from permanent buried oxide (in SOI) to removable polysilicon. This parameter change allows the stop layer to serve its grinding function during manufacturing and then be eliminated, reducing overall device cost while preserving the precision benefits of controlled substrate thinning

Inventive Principle:
Principle #35Parameter changes

2Length of stationary object

If the substrate is thinned by removing material from the backside, then the substrate thickness is reduced, but the process becomes complex without an effective stop mechanism

Engineering Contradiction:
Improvesubstrate thicknessVSAvoidprocess complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the polysilicon stop layer on the substrate backside before the thinning process begins. This pre-positioned stop layer simplifies the subsequent grinding process by providing a clear, detectable endpoint, eliminating the need for complex real-time monitoring or multiple processing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The polysilicon layer acts as an intermediary between the substrate and the grinding process. It provides a distinct mechanical and chemical property difference that enables precise control of the thinning process, serving as a mediator that simplifies the interaction between the grinding tool and the substrate

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces the thickness of the semiconductor substrate while maintaining electrical isolation and interconnect structures, thereby lowering manufacturing costs and improving the efficiency of semiconductor production.

Implementation Method 1

The rear surface of the substrate is subjected to a polishing process to remove a portion of the substrate from the rear surface until the polishing stop structure is exposed

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS20250183096A1Semiconductor structure and fabrication method thereof
Publication Date: 2025.06.05 UNITED MICROELECTRONICS CORP
  • US20250183096A1 patent drawing
  • US20250183096A1 patent drawing
  • US20250183096A1 patent drawing

AI summary

A method for forming a semiconductor structure is disclosed. A substrate having a front surface and a rear surface is provided. A plurality of trenches extending into the substrate from the front surface of the substrate is formed. A polishing stop structure is formed at a bottom of each of the plurality of trenches. The plurality of trenches is filled with a gap-filling material layer. The rear surface of the substrate is subjected to a polishing process to remove a portion of the substrate from the rear surface until the polishing stop structure is exposed.