Substrate Voltage Clamping for GaN Bidirectional Switches

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The electrical performance of semiconductor-based circuits is unpredictable due to uncontrolled voltage excursions on the semiconductor substrate, particularly during high-rate voltage transitions (dV/dt events), which can lead to undesirable circuit behavior.

Innovation Solution

A clamping circuit is implemented on a GaN substrate, comprising a mirrored diode circuit to clamp positive dV/dt events and a mirrored switch circuit to clamp negative dV/dt events, using transistors and diodes to maintain substrate voltage stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a clamping circuit is implemented to stabilize substrate voltage, then substrate voltage stability is improved, but device complexity increases

Engineering Contradiction:
Improvesubstrate voltage stabilityVSAvoidcircuit complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The clamping circuit automatically activates during dV/dt events without external control signals. The transistors and diodes self-regulate substrate voltage excursions through their inherent electrical characteristics, eliminating the need for complex control logic or external intervention while maintaining voltage stability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The clamping circuit acts as an intermediary between the bidirectional switch and the substrate, isolating the substrate from voltage excursions. The circuit components (transistors and diodes) serve as mediators that absorb and redirect voltage spikes, protecting the substrate without requiring modifications to the core circuit architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If bidirectional switches operate during high-rate voltage transitions, then switching speed is improved, but circuit reliability deteriorates due to unpredictable substrate voltage

Engineering Contradiction:
Improveswitching speedVSAvoidcircuit reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The clamping circuit is pre-configured to counteract substrate voltage excursions before they can affect circuit operation. By establishing the clamping mechanism in advance, the circuit proactively prevents unpredictable voltage behavior during high-speed switching, ensuring reliable operation without sacrificing switching performance.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The clamping circuit provides a protective buffer against substrate voltage excursions before they can cause harm. The transistors and diodes are positioned to absorb voltage spikes in advance, creating a cushioning effect that protects the bidirectional switch and other circuit elements during high-rate voltage transitions.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250350273A1Circuits and methods for controlling a voltage of a semiconductor substrate
Publication Date: 2025.11.13 NAVITAS SEMICON LTD
  • US20250350273A1 patent drawing
  • US20250350273A1 patent drawing
  • US20250350273A1 patent drawing

AI summary

An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.