Circuit Substrate Warpage Prevention via Corner Pattern Orientation
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Solution Overview
Problem
Conventional semiconductor chip packages experience warpage due to coefficient of thermal expansion (CTE) mismatch between components, leading to stress concentration and potential open connection failures, as existing warpage prevention methods do not effectively account for different stress directions at the substrate's corners.
Innovation Solution
A circuit substrate with a warpage preventing pattern comprising distinct orientations at adjacent corners, cutting across stress lines to reduce thermal stress concentration, formed using materials like copper and fabricated through processes such as screen printing or photolithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional uniform warpage prevention patterns are used at all corners, then manufacturing is simple, but stress concentration cannot be effectively reduced due to different stress directions at each corner
Solution Approach 1:
The patent applies different pattern orientations at different corners of the substrate. Specifically, the first pattern at the first corner has a first orientation, while the second pattern at the second corner has a second orientation that is different from the first orientation. This local differentiation allows each corner pattern to effectively counteract the specific stress direction at that location, thereby resolving the contradiction between reliability and complexity.
2Strength
If heat treatment is applied to form solder balls or join chip package to circuit board, then bonding strength is improved, but warpage occurs due to CTE mismatch between components
Solution Approach 1:
The warpage prevention patterns are formed on the substrate before the heat treatment process. These patterns are specifically designed to counteract the thermal stress that will be generated during subsequent bonding operations. By establishing this counteracting structure in advance, the patent prevents warpage from occurring during heat treatment while maintaining bonding strength, thus resolving the contradiction between strength and shape stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly reduces warpage of the semiconductor package during heating processes, enhancing reliability by minimizing stress concentration and preventing open connections.
Implementation Method 1
warpage may occur due to the coefficient of thermal expansion (CTE) mismatch between the various components in the chip package... stress concentration and potential open connection failures
Data Source
AI summary
In one embodiment, a circuit substrate comprises a substrate; and a warpage preventing pattern disposed on the substrate. The warpage preventing pattern comprises a first pattern at a first corner of the substrate and a second pattern at a second corner of the substrate. The first corner and the second corner are disposed adjacent to each other. An overall orientation of the first pattern is different from an overall orientation of the second pattern with respect to the substrate. The warping of a semiconductor package can be significantly reduced by cutting off stress lines in the corners of the circuit substrate. Various configurations and orientations of the warpage preventing pattern are provided in order to effectively block stress concentration in the corners of the circuit substrate.