Buried Interconnect Layout Through Trench Isolation for Lower Latency
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Solution Overview
Problem
Existing semiconductor technologies face challenges in achieving high routing density and reducing latency in dense logic and memory blocks due to limitations in wire routing and trench isolation structures.
Innovation Solution
The implementation of buried interconnect structures made of metal materials within the semiconductor substrate, which cross trench isolation structures, along with via interconnects that contact the buried interconnects and extend through the trench isolation structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional wire routing is used in semiconductor substrate, then trench isolation structures can be formed, but routing density is limited and latency increases
Solution Approach 1:
The patent introduces buried interconnect structures that extend vertically through the substrate thickness, utilizing the third dimension (depth) for routing. This allows interconnects to pass through the substrate at different depths, effectively adding a vertical routing dimension that increases overall routing density without consuming additional lateral area on any single layer.
Solution Approach 2:
The interconnect system is segmented into multiple levels: conventional wire routing layers on the substrate surface and buried interconnect structures at different depths within the substrate. This segmentation allows simultaneous use of both surface and subspace routing resources, increasing total routing capacity while maintaining organized signal paths at different levels.
2Productivity
If more wire routing layers are added to increase routing density, then routing capacity improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the substrate itself with the interconnect structure by forming conductive paths within the substrate material. Instead of adding separate routing layers on top of the substrate, the substrate is transformed into an active routing medium, combining the substrate function with the interconnect function and reducing overall system complexity.
Solution Approach 2:
The substrate serves multiple functions: it provides mechanical support, electrical isolation through trench structures, and conductive pathways through the buried interconnects. This multi-functionality reduces the need for additional dedicated routing layers, simplifying the overall device structure while maintaining high routing density.
3Productivity
If conventional routing schemes are used, then manufacturing processes are simpler, but routing density is insufficient for dense logic and memory blocks
Solution Approach 1:
The buried interconnect structures are formed within the substrate before final device assembly and wiring. This preliminary formation of conductive paths at substrate level allows subsequent routing layers to connect to pre-established deep interconnect points, simplifying the overall manufacturing sequence by establishing the routing backbone early in the process.
Data Source
Figure 1A~1B
Figure 2~3
Figure 4A~4B
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to buried interconnect structures and methods of manufacture. The structure includes: a semiconductor substrate; a trench isolation structure extending into the semiconductor substrate; and at least one buried interconnect structure in the semiconductor substrate and crossing the trench isolation structure.