Subthreshold CMOS Circuit Using Oxide N-Channel Transistors
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Solution Overview
Problem
Semiconductor devices, particularly in IoT and biomedical applications, face challenges with high power consumption due to the need for high driving voltages in CMOS circuits, which increases current flow and energy usage, even though low-speed operation is often sufficient.
Innovation Solution
The development of a semiconductor device configuration using p-channel and n-channel transistors with silicon and metal oxide channels, respectively, where the transistors are connected in a subthreshold region to reduce power consumption by operating at lower voltages, utilizing indium and other metals in the metal oxide channel, and incorporating a gate and capacitor structure to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high driving voltage is applied to CMOS circuit to increase driving speed, then driving speed is improved, but power consumption increases due to increased current flow
Solution Approach 1:
The patent changes the operating parameters of the CMOS circuit by utilizing subthreshold operation, where transistors operate below their threshold voltage. This parameter change allows the circuit to function at lower voltages and speeds, directly reducing power consumption while accepting reduced driving speed, which is acceptable for low-power applications like IoT and biomedical devices.
2Speed
If high driving voltage is applied to CMOS circuit, then driving speed is improved, but current flow increases leading to higher power consumption
Solution Approach 1:
The patent employs subthreshold operation to change the operating parameters, allowing the circuit to operate with minimal current flow by utilizing the subthreshold leakage current region. This dramatically reduces the current flow and associated energy loss while maintaining functional operation, suitable for ultra-low power applications.
3Use of energy by moving object
If low driving voltage is used to reduce power consumption, then power consumption is reduced, but driving speed decreases
Solution Approach 1:
The patent accepts the speed reduction as a necessary trade-off for achieving ultra-low power consumption through subthreshold operation. The parameter change to subthreshold voltage operation inherently limits the maximum achievable speed, but this is acceptable for applications where power consumption is the primary constraint rather than processing speed.
Data Source
AI summary
A semiconductor device with reduced power consumption can be provided. The semiconductor device includes a first transistor and a second transistor. The first transistor is a p-channel transistor including silicon in a channel formation region and the second transistor is an n-channel transistor including a metal oxide in a channel formation region. The metal oxide includes indium, an element M (e.g., gallium), and zinc. A gate of the first transistor is electrically connected to a gate of the second transistor, and one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor. The first transistor and the second transistor can each operate in a subthreshold region.