Sub-threshold MOS Bandgap Reference Circuit for Low Voltage
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Solution Overview
Problem
Conventional bandgap reference circuits using BJTs require high power supply voltage and large layout area, and those using CMOS are prone to accuracy reduction due to manufacturing process variations, making them unsuitable for applications requiring lower voltage and high accuracy.
Innovation Solution
A bandgap reference circuit utilizing a PTAT current source, a CTAT voltage generator with MOS transistors operating in a sub-threshold region, and a zero-TC voltage generator, which eliminates the need for BJTs, reducing layout area and power consumption while maintaining high accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If conventional bandgap reference circuits using BJTs are employed for temperature compensation, then temperature stability is improved, but power supply voltage requirement increases and layout area expands
Solution Approach 1:
The patent changes the operating parameters of MOS transistors by operating them in the sub-threshold region rather than saturation region. This parameter change enables the generation of CTAT voltage with much lower voltage headroom requirements, reducing the power supply voltage from typical BJT levels (2.5V+) to sub-threshold levels (0.3-0.6V), thereby resolving the contradiction between temperature stability and power supply voltage requirement
Solution Approach 2:
The patent substitutes BJT-based temperature compensation mechanisms with MOS transistor-based sub-threshold operation. By replacing the BJT physical mechanism with MOS sub-threshold exponential current-voltage characteristics, the circuit achieves comparable temperature compensation performance with significantly reduced layout area and lower voltage requirements
2Stability of the object's composition
If conventional bandgap reference circuits using BJTs are employed for temperature compensation, then temperature stability is improved, but power consumption increases
Solution Approach 1:
The patent changes the operating parameters by utilizing sub-threshold MOS transistor operation where the drain current follows an exponential relationship with gate-source voltage. This parameter change enables ultra-low power operation since sub-threshold MOS circuits can operate with currents in the picoampere to nanoampere range, dramatically reducing power consumption compared to BJT-based bandgap references while maintaining temperature compensation through the exponential temperature dependence of the sub-threshold voltage
3Loss of energy
If CMOS transistors are used for temperature compensation instead of BJTs, then power consumption is reduced, but manufacturing process variation sensitivity increases
Solution Approach 1:
The patent employs feedback mechanisms where the sub-threshold MOS transistors are configured in differential pairs with current mirrors that automatically compensate for manufacturing variations. The feedback action ensures that matched transistors experiencing the same process variations produce identical voltage drops, canceling out the effects of manufacturing precision variations and enabling accurate temperature compensation despite CMOS process variability
4Use of energy by moving object
If sub-threshold MOS transistors are used instead of BJTs, then power supply voltage requirement is reduced, but transistor matching precision must be maintained
Solution Approach 1:
The patent merges multiple sub-threshold MOS transistors into differential pairs and current mirror configurations where matching is inherently enforced by the circuit topology. By combining transistors in matched pairs with identical geometric dimensions and connecting them through current mirrors, the circuit ensures that process variations affect both transistors equally, thereby maintaining the required matching precision while operating at reduced power supply voltages
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high-accuracy zero-TC voltage generation with reduced power consumption and layout area, and is immune to temperature and manufacturing process variations, making it suitable for applications requiring lower voltage.
Implementation Method 1
the OP comprises a first input terminal coupled to the second terminal and the third terminal of the first transistor, a second input terminal coupled to the second terminal and the third terminal of the second transistor, and a output terminal
Implementation Method 2
the capacitor comprises a first terminal coupled to the output terminal of the OP and a second terminal coupled to a ground end
Implementation Method 3
A bandgap reference circuit utilizing a PTAT current source, a CTAT voltage generator with MOS transistors operating in a sub-threshold region
Implementation Method 4
the resistor is coupled between the third terminal of the third transistor and ground end for generating a complementary to absolute temperature (CTAT) voltage, according to a voltage difference between a gate-source voltage of the third transistor and a gate-source voltage of the fourth transistor
Data Source
AI summary
A voltage generator includes a first transistor, a second transistor, an operational amplifier, a capacitor, a third transistor, a fourth transistor and a first resistor. The operational amplifier includes a first terminal coupled to a second terminal of the first transistor, and a second terminal coupled to a second terminal of the second transistor. The capacitor is coupled between an output terminal of the operational amplifier and a ground terminal. The third transistor is coupled to the first transistor and the output terminal of the operational amplifier. The fourth transistor is coupled to the second transistor, the output terminal of the operational amplifier and the ground terminal. The first resistor is utilized for generating a complementary to absolute temperature voltage according to a voltage difference between a gate-source voltage of the third transistor and a gate-source voltage of the fourth transistor.