Subthreshold Metal Oxide Circuit for Heat-Stable Product-Sum Operation
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Solution Overview
Problem
Integrated circuits performing product-sum operations face issues with transistor characteristics changing due to temperature, leading to increased power consumption and circuit area, and difficulties in detecting odor, pressure, and taste components with existing sensors due to large peripheral circuits and high power consumption.
Innovation Solution
A semiconductor device with a circuit structure that includes transistors operating in the subthreshold region, using metal oxide in the channel formation region, and a configuration that allows for efficient current flow and potential supply to reduce power consumption and circuit area, while also incorporating sensors for odor, pressure, and taste detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistors including silicon in their channel formation region are used for product-sum operation circuits, then the circuit can perform arithmetic operations, but the transistor characteristics change due to temperature increase, causing operation failure
Solution Approach 1:
The patent changes the material parameter of the transistor channel from silicon to metal oxide, which fundamentally alters the temperature dependence characteristics of the transistor. Metal oxide transistors exhibit superior thermal stability compared to silicon transistors, allowing the product-sum operation circuit to maintain reliable operation under temperature increases caused by arithmetic operations.
2Measurement precision
If digital multiplication and addition circuits are designed to support multi-bit arithmetic operations, then the calculation precision is improved, but the circuit area and power consumption increase
Solution Approach 1:
The patent replaces traditional digital multiplication and addition circuits with a product-sum operation circuit based on metal oxide transistors operating in the subthreshold region. This analog-based approach performs weighted sum operations directly in the circuit, eliminating the need for large digital multiplication and addition units while achieving the same calculation precision for neural network operations.
Solution Approach 2:
The patent operates metal oxide transistors in the subthreshold region, exploiting the exponential relationship between gate voltage and drain current. This allows multi-bit arithmetic operations to be performed through voltage control of current flow, achieving high calculation precision with significantly reduced circuit area compared to digital implementations.
3Measurement precision
If digital multiplication and addition circuits are designed to support multi-bit arithmetic operations, then the calculation precision is improved, but the power consumption increases
Solution Approach 1:
The patent replaces power-intensive digital multiplication and addition circuits with a metal oxide transistor-based product-sum operation circuit. The subthreshold operation of metal oxide transistors enables analog computation with extremely low power consumption, as the exponential current-voltage relationship allows precise multi-bit operations through minimal voltage changes.
Solution Approach 2:
By operating in the subthreshold region where drain current exponentially depends on gate voltage, the patent achieves multi-bit arithmetic precision with minimal power dissipation. The metal oxide transistor's sharp subthreshold characteristics enable high-precision weighted sum operations at ultra-low power levels, far below conventional digital circuit consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves low power consumption, reduced circuit area, and improved heat resistance, enabling efficient product-sum operations and effective detection of various odor, pressure, and taste components with reduced peripheral circuit complexity.
Implementation Method 1
Each memory element of the product-sum operation circuit outputs a current corresponding to a product of data corresponding to a multiplier stored in each memory and input data corresponding to a multiplicand by using an operation in the subthreshold region of a transistor including silicon in its channel formation region
Implementation Method 2
A semiconductor device with a circuit structure that includes transistors operating in the subthreshold region, using metal oxide in the channel formation region
Data Source
AI summary
A semiconductor device resistant to a high temperature with low power consumption is provided. The semiconductor device includes a first and a second circuit, a first and a second cell, and a first and a second wiring. The first cell includes a first transistor, and the second cell includes a second transistor. The first and the second transistor operate in a subthreshold region. The first cell is electrically connected to the first circuit through the first wiring, the first cell is electrically connected to the second circuit through the second wiring, and the second cell is electrically connected to the second circuit through the second wiring. The first cell sets a current flowing through the first transistor to a first current and the second cell sets a current flowing through the second transistor to a second current. At this time, a potential corresponding to the second current is input from the second wiring to the first cell. Then, a third current flows from the second circuit to change a potential of the second wiring, whereby the first cell outputs a fourth current corresponding to the amount of the potential change and the first current.