Subtractive Interconnect Air Gaps for Lower Parasitic Capacitance
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Solution Overview
Problem
As integrated circuits shrink, effective isolation of components becomes increasingly difficult, leading to parasitic capacitive coupling, charge leaking, and potential shorts among metal structures.
Innovation Solution
The introduction of air gaps within non-nested spacings between metal lines, utilizing gapping structures such as sidewall spacers, dividers, and dummy metal lines, to create second air gaps that reduce parasitic capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integrated circuits are reduced in size to increase density, then productivity and device integration are improved, but parasitic capacitive coupling and charge leaking among metal structures increase
Solution Approach 1:
The patent extracts the dielectric material between metal interconnect lines and replaces it with air gaps. This removes the harmful dielectric constant contribution from the spacing material, thereby reducing parasitic capacitance between adjacent metal lines while maintaining the high-density integration layout
Solution Approach 2:
The patent changes the physical parameter of the spacing material from solid dielectric (with high dielectric constant) to air (with dielectric constant of approximately 1). This parameter change directly reduces the parasitic capacitance between metal interconnects, solving the harmful effect while preserving circuit density
2Area of stationary object
If metal structures are placed closer together to reduce size, then area is reduced, but isolation between components deteriorates leading to shorts and leakage
Solution Approach 1:
The patent introduces air gaps as intermediary structures between metal interconnect lines. These air gaps act as electrical isolators with minimal dielectric coupling, providing reliable component isolation while allowing metal structures to be placed closer together, thus reducing chip area without sacrificing reliability
3Ease of manufacture
If dielectric material is used between metal lines to fill spacing, then manufacturing is simplified, but parasitic capacitance increases reducing operational speed
Solution Approach 1:
The patent removes the dielectric material from the spacing between metal lines and replaces it with air. This extraction eliminates the parasitic capacitance contribution from the dielectric material, thereby increasing transistor operational speed while the air gap formation process maintains manufacturing simplicity through selective etching and deposition techniques
Data Source
AI summary
A semiconductor device includes metal lines disposed in a layer. The metal lines include a first spacing and a second spacing. The second spacing is larger than a minimum pitch between the metal lines. A gapping structure is disposed within the second spacing. A second air gap is disposed adjacent to the gapping structure within the second spacing.