Subtractive Skip Via Structure for Void-Free HAR Interconnects
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Solution Overview
Problem
Traditional skip via manufacturing processes face challenges such as the need for high aspect ratio etches, void formation due to copper plating, and insufficient seed coverage, leading to decreased device performance.
Innovation Solution
A subtractive skip via integration technique that avoids high aspect ratio etches and copper plating, using a low aspect ratio opening for metal fill, followed by dielectric backfill to reduce shorting and improve etch selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional skip via manufacturing processes are used, then via connections can be formed through multiple insulator layers, but high aspect ratio etches are required which lead to void formation and insufficient seed coverage
Solution Approach 1:
Instead of forming high aspect ratio vias through deep etching from the top, the patent inverts the approach by forming low aspect ratio openings and filling them with metal, then using dielectric backfill to create the skip via connection. This inversion eliminates the need for high aspect ratio etching and associated void formation problems.
Solution Approach 2:
The patent changes the aspect ratio parameter of the via opening from high to low by altering the formation methodology. By creating shallow openings that are then filled and built up with dielectric material, the effective aspect ratio is reduced, improving etch selectivity and eliminating void formation.
2Reliability
If copper plating is used to fill skip vias, then conductive connections are formed, but void formation occurs due to pinch-off from sidewall growth
Solution Approach 1:
Instead of plating copper from the bottom up through deep etched holes (which causes sidewall growth and pinch-off), the patent inverts the process by forming shallow openings, filling them with metal, and building the structure upward with dielectric backfill. This eliminates the pinch-off effect and void formation.
Solution Approach 2:
The patent performs preliminary metal fill in low aspect ratio openings before forming the complete skip via structure. This preliminary action ensures complete metal coverage without voids, and subsequent dielectric backfill protects the metal fill from developing defects.
3Length of stationary object
If high aspect ratio etches are performed, then deep via openings are created, but etch selectivity is insufficient leading to poor manufacturing control
Solution Approach 1:
The patent segments the via formation process into multiple steps: forming low aspect ratio openings, filling with metal, and adding dielectric backfill in layers. This segmentation allows each step to be precisely controlled with standard etch selectivity, achieving the overall deep via connection without requiring difficult high aspect ratio etching.
Solution Approach 2:
The patent solves the depth problem by adding a vertical dimension through dielectric backfill rather than relying solely on deep etching. The skip via connection is achieved by combining shallow metal-filled openings with layered dielectric construction, transforming a single deep etch problem into multiple shallow steps.
4Manufacturing precision
If subtractive skip via with dielectric backfill is used, then void formation is reduced and etch selectivity is improved, but additional manufacturing steps are required
Solution Approach 1:
The patent merges the metal fill and dielectric backfill operations into an integrated process flow that can be combined with existing manufacturing steps. By combining these operations and optimizing the sequence, the additional steps are efficiently incorporated without proportionally increasing overall manufacturing time.
Data Source
AI summary
A semiconductor device includes a subtractive skip via technique in which a relatively high aspect ratio (HAR) skip via is fabricated within a lower aspect ratio (LAR) skip via opening. A metal fill is formed within the LAR skip via opening. Undesired portions of the metal fill region are removed, a retained portion or portion thereof forms the HAR skip via, and/or retained portions thereof forms multiple HAR skip vias, or the like. After forming these substrative via(s), a dielectric backfill may be formed therearound within the remaining LAR skip via opening. This backfill dielectric may be selected to reduce shorting propensities between the substrative via(s) and respective one or more wiring structures in a lower level, in a higher level, and/or the skipped level(s).


