SuBUS Slave Circuit Timing Without an Accurate Reference Clock
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Solution Overview
Problem
SuBUS slave circuits lack an accurate timing reference source to determine precise timing for terminating slave tasks and unblocking communication on a single-wire bus, leading to potential cost and current drain issues.
Innovation Solution
The SuBUS slave circuit uses a self-determined slave free-running-oscillator count derived from a start-of-sequence training sequence to terminate slave tasks and unblock the bus, eliminating the need for an accurate timing reference source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an accurate timing reference source is used in the SuBUS slave circuit, then precise timing for terminating slave tasks and unblocking the bus is achieved, but cost and current drain increase
Solution Approach 1:
The slave circuit uses its own free-running oscillator to generate timing references locally, eliminating the need for an external accurate timing reference source. The oscillator count is self-determined based on the number of FRO cycles observed during the SOS training sequence, allowing the slave to autonomously manage timing without additional power-hungry components
Solution Approach 2:
The patent replaces expensive and power-consuming accurate timing reference sources (such as crystal oscillators) with a simple free-running oscillator that has lower precision but sufficient functionality for the application. The FRO is a low-cost, low-power alternative that provides adequate timing for task termination and bus unblocking operations
2Measurement precision
If an accurate timing reference source is used in the SuBUS slave circuit, then precise timing for terminating slave tasks and unblocking the bus is achieved, but device complexity and cost increase
Solution Approach 1:
The slave circuit autonomously determines the oscillator count by counting FRO cycles during the SOS training sequence reception, eliminating the need for external timing reference components. This self-service approach reduces device complexity while maintaining sufficient timing precision for bus unblocking operations
Solution Approach 2:
The patent extracts and removes the accurate timing reference source from the slave circuit, retaining only the essential free-running oscillator. This extraction simplifies the device by eliminating unnecessary complex timing components while preserving the core functionality of timing-based task termination and bus unblocking
3Duration of action of moving object
If the slave task blocks communication on the SuBUS for an extended period, then the slave task can be completed thoroughly, but communication resumption is delayed
Solution Approach 1:
The slave circuit uses feedback from the master's SOS training sequence to determine the oscillator count, which then controls the duration of the slave task. This feedback mechanism ensures the slave task completes necessary operations while automatically timing out to unblock the bus, preventing excessive communication delays
Solution Approach 2:
The slave task operates with a periodic timing mechanism based on the free-running oscillator cycles. The task executes for a determined number of FRO periods, then automatically terminates and unblocks the bus, creating a regular cycle of task execution and communication resumption that balances thorough task completion with timely communication restoration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces cost and current drain by enabling precise timing determination without an accurate timing reference, allowing efficient communication resumption on the SuBUS.
Implementation Method 1
the SuBUS slave circuit is configured to terminate the slave task and unblock the SuBUS based on a self-determined slave free-running-oscillator (FRO) count
Data Source
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AI summary
A single-wire bus (SuBUS) slave circuit is provided. The SuBUS slave circuit is coupled to a SuBUS bridge circuit via a SuBUS and can be configured to perform a slave task that may block communication on the SuBUS. Notably, the SuBUS slave circuit may not be equipped with an accurate timing reference source that can determine a precise timing for terminating the slave task and unblock the SuBUS. Instead, the SuBUS slave circuit is configured to terminate the slave task and unblock the SuBUS based on a self-determined slave free-running-oscillator count derived from a start-of-sequence training sequence that precedes any SuBUS telegram of a predefined SuBUS operation, even though the SuBUS operation is totally unrelated to the slave task. As such, it may be possible to eliminate the accurate timing reference source from the SuBUS slave circuit, thus helping to reduce cost and current drain in the SuBUS slave circuit.