Sub-Word Line Driver Circuit With Bleeder Chain for Floating Word Lines
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Solution Overview
Problem
Existing memory devices face issues with data corruption due to potential memory array defects causing floating, unselected word lines to be sourced high enough, leading to inefficiencies in space usage, power consumption, and reliability of sub-word line drivers.
Innovation Solution
Implementing a chain of interconnected bleeder transistors coupled to a low voltage to maintain floating word lines at a negative voltage, using a single-transistor sub-word line driver configuration to improve performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If floating word lines are left unconnected, then device complexity is reduced, but data corruption occurs due to voltage sourcing from memory array defects
Solution Approach 1:
A virtual ground node is introduced as an intermediary between the floating word line and the memory array. This virtual ground acts as a mediator that prevents direct coupling between unselected word lines and the array, thereby blocking the path for defect-induced voltage sourcing while maintaining circuit completeness.
Solution Approach 2:
The word line driver circuit is segmented into multiple functional blocks: selected word line drivers that connect to the memory array, unselected word line drivers that connect to the virtual ground, and the virtual ground node itself. This segmentation isolates the harmful electrical paths while preserving the necessary driver functionality.
2Reliability
If multiple transistors are used in sub-word line drivers, then reliability is improved, but space consumption increases
Solution Approach 1:
The virtual ground node serves multiple functions simultaneously: it provides a reference voltage for unselected word lines, acts as a disconnection point to prevent defect propagation, and serves as a common return path for multiple unselected word lines. This multi-functionality reduces the need for separate circuit elements, thereby reducing area.
Solution Approach 2:
Multiple unselected word line drivers are merged and connected to the common virtual ground node rather than being individually connected to separate reference points or ground terminals. This merging reduces the total number of transistor connections and circuit elements required, thereby reducing the overall chip area.
3Reliability
If traditional word line drivers are used, then power consumption is higher, but reliability is maintained
Solution Approach 1:
The virtual ground node is periodically recharged from the main ground through switching elements during memory operations. Instead of continuously maintaining a separate power supply for unselected word lines, the system uses periodic charging cycles that are synchronized with the memory access patterns, thereby reducing average power consumption while maintaining reliability during active periods.
Data Source
AI summary
A device may include a number of word lines, a number of sub-word line drivers, and a number of phase signal lines. Each sub-word line driver is coupled to a main word line and a respective word line of the number of word lines. Each sub-word line driver includes a transistor. Each phase signal line is coupled to a respective gate of a respective transistor of a respective sub-word line driver of the number of sub-word line drivers. A chain of bleeder transistors is interconnected with the word lines and coupled to a negative word line voltage. The chain of bleeder transistors are biased to leak to the negative word line voltage to maintain floating word lines at the negative word line voltage.