Sub-word Line Driver Circuit Mitigates Row Hammer Stress
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In memory devices, the combination of high capacitance and resistance in word lines, particularly those fabricated from polysilicon, hinders quick signal switching, leading to issues like row hammer stress and leakage, which can result in data loss due to rapid voltage changes affecting adjacent memory rows.
Innovation Solution
The implementation of local word line drivers with PMOS and NMOS transistors, along with intermediate voltage circuits in main word line drivers, helps mitigate row hammer stress by pausing the local word line voltage at an intermediate level during transitions, reducing the impact on adjacent rows and improving switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If local word line drivers are implemented to improve switching speed, then the switching speed of word lines is enhanced, but the device complexity increases due to additional driver circuits
Solution Approach 1:
The word line driver system is segmented into global word line drivers (GWLDs) that control entire word lines and local word line drivers (LWLDs) that control portions of word lines. This segmentation allows LWLDs to be positioned closer to distant memory cells, reducing RC delays and improving switching speed for those cells without requiring a complete redesign of the entire driver system.
Solution Approach 2:
The local word line driver circuits are integrated within the memory cell array structure itself, with LWLDs positioned between smaller memory cell arrays. This nesting approach allows the additional driver functionality to be incorporated into the existing memory architecture without requiring separate external driver circuits, thereby managing device complexity while improving performance.
2Reliability
If intermediate voltage circuits are used to mitigate row hammer stress, then data reliability is improved, but the device complexity increases due to additional voltage control circuits
Solution Approach 1:
The intermediate voltage circuit proactively applies an intermediate voltage level to the word line before the full voltage transition occurs, particularly during precharge operations. This preliminary action mitigates row hammer stress by preventing rapid voltage changes that could affect adjacent memory rows, thereby improving data reliability before potential errors can occur.
Solution Approach 2:
An intermediate voltage level is introduced as a mediator between the active high voltage state and the precharge low voltage state of the word line. This intermediate voltage acts as a buffer that reduces the severity of voltage transitions, thereby mitigating row hammer stress and improving data retention without requiring complex external control systems.
3Ease of manufacture
If polysilicon is used for word line fabrication to reduce manufacturing costs, then manufacturing cost is reduced, but the resistance increases leading to slower switching
Solution Approach 1:
The word line is divided into segments controlled by separate global and local drivers. This segmentation compensates for the high resistance of polysilicon by reducing the effective length of wire each driver must control, thereby maintaining switching speed despite using cost-effective polysilicon material.
Solution Approach 2:
Local word line drivers act as intermediary stages between the global drivers and the distant memory cells. These intermediaries amplify and refresh the signal along the high-resistance polysilicon word line, compensating for signal degradation and maintaining switching speed without requiring low-resistance materials.
Data Source
AI summary
A sub-word line circuit having a phase driver circuit to provide a first phase signal and a second phase signal. The sub-word line circuit includes a sub-word line driver circuit having a pull-up circuit configured to receive the first phase signal and a global word line signal. The pull-up circuit is further configured to drive a local word line to follow the global word line signal when the first phase signal is at a first value and isolate the local word line from the global word line signal when the first phase signal is at a second value. The sub-word line circuit also includes a processing device that sets the first phase signal to the first value prior to the global word line signal entering an active state and sets the first phase signal to the second value only after the global word line signal has entered a pre-charge state.