Successive Digital Post-Distortion Correction for Parallel Lane Processing

The patent divides the transmission lanes into multiple subsets and processes each subset separately in different iterations. Instead of processing all lanes simultaneously, the correction process is segmented into multiple stages, where each stage handles a portion of the lanes. This reduces the computational complexity and memory requirements while maintaining acceptable correction accuracy through iterative refinement.

By segmenting the correction process into iterations handling subsets of lanes, the patent enables earlier completion of correction for priority lanes while continuing processing for other lanes. This segmented approach reduces overall latency compared to waiting for all lanes to be processed simultaneously, while still achieving good accuracy through the iterative nature of the correction.

The patent converts the harmful effect of non-linear distortion (which increases when using reduced supply voltage) into a correctable parameter. By implementing digital post-distortion correction that models and compensates for the non-linear effects, the system can operate the power amplifier at reduced voltage levels while maintaining signal quality. The distortion that would normally be harmful is instead measured and corrected digitally, turning the power-saving opportunity into a viable solution.

The patent maintains continuity of useful action by performing corrections on subsets of lanes across multiple iterations rather than completing all corrections in a single batch. Each iteration builds upon previous corrections, continuously improving signal quality. This iterative approach keeps the processing complexity manageable while ensuring that correction work is continuously performed across all lanes, maintaining convergence toward the optimal solution.