Sum-of-Products Accelerator Array Voltage Sensing
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Solution Overview
Problem
Existing neuromorphic computing and machine learning systems face challenges in implementing energy-efficient sum-of-products operations due to high power consumption in large arrays with many inputs and outputs.
Innovation Solution
A device comprising an array of variable resistance cells with programmable threshold transistors and resistors in parallel, where the resistance is controlled by voltage applied to the transistor's control gate, allowing for voltage sensing to limit current and reduce power consumption, implemented using charge trapping memory transistors and buried implant resistors for compact layout and efficient operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a very large array is used to perform many operations in parallel, then productivity is improved, but power consumption increases
Solution Approach 1:
The patent replaces traditional current-based sensing with voltage sensing in the sum-of-products accelerator array. This substitution allows for reduced power consumption because voltage sensing requires significantly less current compared to traditional current sensing methods, while still enabling parallel operation of multiple cells in the array
Solution Approach 2:
The patent changes the sensing parameter from current to voltage measurement. By measuring voltage instead of current at the output nodes, the system can determine the sum-of-products results with much lower power consumption, enabling large arrays to operate in parallel without proportionally increasing power usage
2Use of energy by moving object
If voltage sensing is used to reduce current, then power consumption is reduced, but measurement precision may be affected
Solution Approach 1:
The patent introduces differential voltage sensing as an intermediary mechanism. By using differential pairs and reference voltages, the system can accurately measure small voltage differences that correspond to the sum-of-products results, maintaining measurement precision while operating at lower current levels
Solution Approach 2:
The patent employs feedback mechanisms through regulated voltage sources and reference circuits that continuously adjust and compensate for voltage variations. This feedback ensures that voltage sensing maintains high precision by correcting for drift and noise, matching the accuracy of traditional current-based methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables energy-efficient sum-of-products operations by controlling current and voltage in the array, reducing power consumption while maintaining high performance in large-scale neuromorphic computing systems.
Implementation Method 1
The variable resistance of each variable resistance cell, in embodiments described herein, is a function of a voltage applied to the control gate of the programmable threshold transistor in the cell, a threshold of the programmable threshold transistor, and the resistor
Implementation Method 2
The device in some embodiments includes a voltage sensing sense amplifier, configured to sense the voltage generated by the variable resistance cells, as a function of an applied current and the resistance of the variable resistance cells
Implementation Method 3
the programmable threshold transistors in the variable resistance cells comprise charge trapping memory transistors, such as floating gate transistors or dielectric charge trapping transistors
Data Source
AI summary
A device for generating sum-of-products data includes an array of variable resistance cells, variable resistance cells in the array each comprising a programmable threshold transistor and a resistor connected in parallel, the array including n columns of cells including strings of series-connected cells and m rows of cells. Control and bias circuitry are coupled to the array, including logic for programming the programmable threshold transistors in the array with thresholds corresponding to values of a weight factor Wmn for the corresponding cell. Input drivers are coupled to corresponding ones of the m rows of cells, the input drivers selectively applying inputs Xm to rows m. Column drivers are configured to apply currents In to corresponding ones of the n columns of cells. Voltage sensing circuits operatively coupled to the columns of cells.