Super Block Memory Control for Erase-Program Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices, such as solid-state drives using nonvolatile memories, face a limitation in the number of program-erase cycles due to the diffusion of holes in floating gates, which distorts the threshold voltage distribution and requires programming within a predetermined time after erasure.
Innovation Solution
A method and apparatus for a memory system that allows for a program operation to be performed without delay by executing a series of commands that control the memory device in units of super blocks, where a first erase operation is performed on one set of blocks during a first time interval, and a first program operation is performed on another set of blocks during the same interval, followed by a second erase and program operation in subsequent intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential erase and program operations are performed in traditional memory systems, then the erase operation can be completed, but the program operation must wait for erase completion causing time delay
Solution Approach 1:
The memory device is divided into multiple independent blocks that can be operated separately. The erase operation is segmented to affect only specific blocks (first block set) while leaving other blocks (second block set) available for immediate program operations, thus eliminating the wait time that would normally be required for complete erase completion.
Solution Approach 2:
The patent introduces a spatial dimension to the operation scheduling by organizing memory into multiple blocks that can be accessed independently. Instead of sequential time-based operations, the system performs erase and program operations in parallel across different blocks, effectively adding a spatial parallelism dimension to overcome the time constraint.
2Reliability
If erase operation is performed on all blocks, then complete memory preparation is achieved, but program operation cannot start until erase is fully completed
Solution Approach 1:
The memory operation is segmented into independent block-level operations. Instead of treating the entire memory as a single unit that must be fully erased before any program operation, the system segments the erase operation to specific blocks, allowing other blocks to undergo program operations simultaneously, thus maintaining operational completeness while improving throughput.
Solution Approach 2:
The patent enables continuous useful action by ensuring that while some blocks are being erased, other blocks are simultaneously being programmed. This eliminates idle time and maintains continuous productive operation across the memory system, maximizing throughput without compromising the completeness of memory preparation.
3Reliability
If memory cells are erased and held before programming, then erase operation can be completed thoroughly, but holes diffuse and threshold voltage distribution distorts
Solution Approach 1:
The patent applies preliminary action by performing the program operation immediately after the erase operation on each block, without delaying or holding the erased state. By promptly programming the blocks after erasure, the system prevents hole diffusion that would occur during extended holding periods, thus maintaining threshold voltage distribution precision while ensuring thorough erase completion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient programming without delay due to the completion of the erase operation, thereby avoiding the erase-to-program interval constraint and optimizing the performance of memory systems.
Implementation Method 1
During a first time interval, a first erase operation is performed on a first-first block among a first-first block to a first-Mth block... During the first time interval, a first program operation is performed on a second-first block to a second-Mth block
Implementation Method 2
During a second time interval after the first time interval, a second erase operation is performed on a first-second block among the first-first block to the first-Mth block based on the second commands. During the second time interval, a second program operation is performed on the first-first block and one or more blocks among the second-first block to the second-Mth block
Data Source
AI summary
A memory system includes a memory controller and a memory device including a plurality of dies, each die including a plurality of blocks. A plurality of commands are configured to control the memory device in units of super blocks. During a first time interval, a first erase operation is performed on a first-first block among the first-first block to a first-Mth block, and a first program operation is performed on a second-first block to a second-Mth block, based on the first commands. During a second time interval, a second erase operation is performed on a first-second block among the first-first block to the first-Mth block, and a second program operation is performed on the first-first block and one or more blocks among the second-first block to the second-Mth block, based on the second commands.