Super CMOS Devices Using Schottky Diodes for Low Voltage Operation
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Solution Overview
Problem
Conventional CMOS technology faces challenges in reducing physical dimensions and power supply voltage while maintaining performance and cost efficiency, leading to limitations in further miniaturization and increased device functionality, especially below 1.8V, where speed degradation occurs and power consumption becomes a concern.
Innovation Solution
The introduction of Super CMOS (SCMOS) technology, which combines elements from Bipolar Junction Transistors and Complementary Metal Oxide Silicon Transistors, utilizing Schottky CMOS Logic, low barrier Schottky diodes, and multi-level cell transistors to create a more compact, high-speed, and low-power circuit architecture, enabling efficient operation down to 0.7V with reduced power consumption and increased integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional CMOS technology is used to reduce physical dimensions and power supply voltage, then integration density improves, but speed degradation occurs and power consumption increases below 1.8V
Solution Approach 1:
The patent combines bipolar junction transistor (BJT) and complementary metal oxide semiconductor (CMOS) transistor technologies into a hybrid SCMOS architecture. This merging allows the circuit to leverage the high-speed switching characteristics of bipolar transistors while maintaining the low-power advantages of CMOS, thereby resolving the speed degradation issue that occurs when conventional CMOS is scaled below 1.8V while preserving integration density improvements
2Length of moving object
If conventional CMOS technology is used to reduce physical dimensions and power supply voltage, then device miniaturization improves, but power consumption becomes a concern
Solution Approach 1:
The patent applies local quality by using bipolar junction transistors specifically in regions where high-speed switching is critical, while maintaining CMOS transistors in other areas. This localized application of different transistor types allows the circuit to achieve miniaturization benefits while consuming less power overall, as bipolar transistors are only used where their high-speed characteristics are needed rather than throughout the entire circuit
3Ease of manufacture
If physical dimensions of circuit elements are reduced to increase IC density, then manufacturing cost decreases, but device performance and reliability may deteriorate
Solution Approach 1:
The patent creates a composite transistor structure that integrates both bipolar and CMOS transistor technologies on the same substrate. This composite approach allows the circuit to benefit from the high-density, low-cost manufacturing of scaled CMOS processes while incorporating bipolar transistors that provide superior reliability and performance characteristics, thereby maintaining device reliability even as physical dimensions are reduced for increased integration density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
SCMOS technology achieves significant cost and performance advantages by enhancing system efficiency, reducing power consumption by up to 70%, improving integration density, and extending the lifespan of Moore's Law by enabling efficient operation at lower voltages with higher speed and compactness compared to traditional CMOS-TTL circuits.
Implementation Method 1
low barrier Schottky diodes
Data Source
AI summary
A low cost IC solution is disclosed to provide Super CMOS microelectronics macros. Hereinafter, the Super CMOS or Schottky CMOS all refer to SCMOS. The SCMOS device solutions with a niche circuit element, the complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co/Ti) to P— and N—Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components. The macros include diodes that are selectively attached to the diffusion bed of the transistors, configuring them to form generic logic gates, memory cores, and analog functional blocks from simple to the complicated, from discrete components to all grades of VLSI chips. Solar photon voltaic electricity conversion and bio-lab-on-a-chip are two newly extended fields of the SCMOS IC applications.