Super Junction Column Structure for Stable Withstand Voltage
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Solution Overview
Problem
The semiconductor device with a super junction structure (SJ structure) has a narrow process margin, leading to significant fluctuations in withstand voltage due to process errors, as even minor deviations in the width of the column region can concentrate electric fields, lowering the breakdown voltage.
Innovation Solution
Incorporating a compensation region within the column region with a gradient of impurity concentrations, including a low concentration portion and a high concentration portion, which balances the charge and mitigates electric field concentration, thereby stabilizing the withstand voltage across variations in the column region's width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a fixed p-type impurity concentration is used in the column region to achieve charge balance, then the withstand voltage is maximized, but the process margin becomes extremely narrow causing large fluctuations in withstand voltage
Solution Approach 1:
The column region is divided into multiple regions with different impurity concentrations: a first columnar region with a first p-type impurity concentration and a second columnar region with a second p-type impurity concentration. This local differentiation allows each region to contribute differently to charge balance, providing process margin while maintaining high withstand voltage.
Solution Approach 2:
The invention changes the impurity concentration parameter from a fixed value to a graded distribution. By setting the first p-type impurity concentration to be higher than the second p-type impurity concentration, the system achieves both charge balance and tolerance to process variations, resolving the contradiction between maximum withstand voltage and process margin.
2Quantity of substance
If the width of the column region is increased beyond the designed value, then the p-type charge amount surpasses the n-type charge amount, but electric field concentrates on the lower end portion causing lowered withstand voltage
Solution Approach 1:
The column region is structured with different impurity concentrations in different spatial locations. The first columnar region (with higher concentration) and second columnar region (with lower concentration) are positioned to control electric field distribution, preventing concentration at the lower end portion even when total p-type charge exceeds n-type charge.
3Quantity of substance
If the width of the column region is decreased below the designed value, then the n-type charge amount surpasses the p-type charge amount, but electric field concentrates on the upper end portion causing lowered withstand voltage
Solution Approach 1:
The differentiated impurity concentration structure in the column region ensures that even when n-type charge exceeds p-type charge, the electric field does not concentrate at the upper end portion. The specific arrangement of first and second columnar regions with different concentrations provides field distribution control that maintains withstand voltage.
4Device complexity
If a uniform impurity concentration is used in the column region, then the structure is simple, but the allowable range for process error is extremely narrow
Solution Approach 1:
Instead of uniform impurity concentration, the invention employs a non-uniform structure with first and second columnar regions having different p-type impurity concentrations. This increases structural complexity but dramatically improves process error tolerance by providing an allowable range for manufacturing variations.
Solution Approach 2:
The column region is segmented into multiple sub-regions with different impurity concentrations. This segmentation allows each segment to contribute differently to the overall charge balance, creating a structure that is more tolerant of process errors while maintaining electrical performance.
Data Source
AI summary
A semiconductor device includes a semiconductor chip having a main surface, a first conductivity type drift region formed in a surface layer portion of the main surface, and a second conductivity type column region formed in a column shape extending in the thickness direction in the drift region, the column region having a lower end portion, an intermediate portion and an upper end portion, wherein the column region has a compensation region including a low concentration portion which is formed between the lower end portion and the intermediate portion, and a high concentration portion which is formed between the intermediate portion and the upper end portion, the compensation region in which a charge balance is compensated within an impurity concentration range between the low concentration portion and the high concentration portion.


