Super Junction Semiconductor Device Dopant Profile Control

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Solution Overview

Problem

Ion implantation in semiconductor manufacturing often results in non-uniform dopant distributions, which can affect the performance of semiconductor devices by leading to variations in dopant concentration and electrical properties.

Innovation Solution

The use of an aligned low divergence ion implant process, where the ion beam direction deviates from the main crystal direction by at most 1 degree and the main beam incidence angle divergence is at most ±0.5 degree, allows for more precise control of dopant placement, resulting in uniform vertical dopant profiles and reduced thermal budgets for diffusion processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional ion implantation is used, then dopant distribution is achieved, but the distribution is non-uniform with lateral undulation

Engineering Contradiction:
Improvedopant distribution uniformityVSAvoiddevice performance consistency
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the ion implantation parameters by aligning the ion beam direction with the main crystal direction and reducing beam divergence to at most ±0.5 degree. This parameter optimization transforms the conventional Gaussian dopant profile into a more uniform vertical profile, directly resolving the contradiction between manufacturing precision and device reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs multiple sequential ion implantation steps with alternating polarity (n-type and p-type dopants) to build up the super junction structure layer by layer. This periodic action ensures uniform dopant distribution throughout the device structure, improving both manufacturing precision and final device performance consistency

Inventive Principle:
Principle #19Periodic action

2Manufacturing precision

If higher thermal budgets are used for diffusion processes, then dopant distribution can be improved, but thermal budget and processing time increase

Engineering Contradiction:
Improvedopant concentration uniformityVSAvoidthermal processing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs precise ion implantation with aligned low divergence beam before thermal diffusion, creating an optimized initial dopant distribution. This preliminary action reduces the extent of subsequent thermal diffusion needed, thereby maintaining dopant uniformity while significantly reducing thermal processing time and budget

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach leads to more uniform dopant distributions, reducing lateral undulation and achieving high reverse breakdown voltage with lower thermal budgets, enhancing the homogeneity of the electric field and device performance.

Implementation Method 1

Ion implantation is used to form p-doped and n-doped regions in semiconductor materials. Ionized impurity atoms are accelerated and directed at a surface of a single crystalline semiconductor substrate. The ionized atoms enter the crystal lattice, collide with the atoms of the lattice and come to rest at a depth determined by the acceleration voltage as well as the impurity and substrate materials.

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a main beam direction deviates from a main crystal direction, along which channeling of implant ions occurs, by at most 1 degree

Methodology Applied
Scientific EffectChanneling:

Implementation Method 3

growing by epitaxy a first sub-layer on a substrate layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9105487B2Super junction semiconductor device
Publication Date: 2015.08.11 INFINEON TECHNOLOGIES AG
  • US9105487B2 patent drawing
  • US9105487B2 patent drawing
  • US9105487B2 patent drawing

AI summary

A super junction semiconductor device includes a substrate layer of a first conductivity type and an epitaxial layer adjoining the substrate layer and including first columns of the first conductivity type and second columns of a second conductivity type. The first and second columns extend along a main crystal direction into the epitaxial layer and have vertical dopant profiles perpendicular to the first surface. The vertical dopant profile of at least one of the first and second columns includes first portions separated by second portions. In each of the first portions a dopant concentration varies by at most 30% of a maximum value within the respective first portion. In the second portions the dopant concentration is lower than in the adjoining first portions. A ratio of a total length of the first portions to a total length of the first and second portions is at least 50%.