Super Junction Semiconductor Structure With Intermediary Doping Buffer
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Solution Overview
Problem
Existing semiconductor devices with super junction structures face challenges in maintaining high breakdown voltage due to direct contact between high impurity concentration p-type and n-type semiconductor regions, leading to increased electric field intensity and reduced dopant efficacy.
Innovation Solution
The semiconductor device design includes a second part of the n-type second semiconductor region with a low impurity concentration positioned between n-type and p-type semiconductor regions with high impurity concentrations, reducing direct contact and suppressing high electric field intensity, while maintaining a super junction structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high impurity concentration p-type and n-type semiconductor regions are directly contacted to form super junction structure, then breakdown voltage is improved, but electric field intensity increases and dopant efficacy decreases
Solution Approach 1:
A low impurity concentration n-type semiconductor region is introduced as an intermediary layer between the high impurity concentration p-type and n-type semiconductor regions. This intermediary region acts as a buffer that reduces direct contact between the high impurity concentration regions, thereby suppressing the generation of high electric field intensity while maintaining the breakdown voltage enhancement provided by the super junction structure.
2Reliability
If high impurity concentration p-type and n-type semiconductor regions are directly contacted, then super junction structure is formed, but dopant efficacy rate decreases
Solution Approach 1:
The low impurity concentration n-type semiconductor region serves as an intermediary that reduces the direct interaction between high impurity concentration dopants from p-type and n-type regions. This intermediary layer prevents excessive dopant diffusion and interaction, thereby improving dopant efficacy rate while still allowing the super junction structure to provide enhanced breakdown voltage.
3Reliability
If high impurity concentration regions are directly contacted, then charge unbalance margin is reduced, but super junction structure is maintained
Solution Approach 1:
The low impurity concentration n-type semiconductor region acts as a buffer zone that separates the high impurity concentration p-type and n-type regions. This separation prevents excessive charge interaction and maintains a more balanced charge distribution, thereby increasing the charge unbalance margin while preserving the super junction structure's breakdown voltage enhancement capability.
Data Source
AI summary
A semiconductor device includes first and second electrodes, first to sixth semiconductor regions, and a gate electrode. The first semiconductor region is located on the first electrode. The second semiconductor region is located on the first semiconductor region. The second semiconductor region includes a first part and a second part. The second part is located on a portion of the first part. The third semiconductor region is located on an other portion of the first part. The fourth semiconductor region separated from the third semiconductor region with the second part interposed. The fifth semiconductor region is located on the third semiconductor region. The sixth semiconductor region is located on the fifth semiconductor region. The gate electrode faces the portion of the fifth semiconductor region via a gate insulating layer. The second electrode is located on the fifth and sixth semiconductor regions.