Super Junction Field-Effect Transistor With Segmented Epitaxial Trenches
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices with super junction structures face challenges in increasing withstand voltage without increasing turn on resistance, and the multi-epi technology used to form these structures is complex, costly, and difficult to miniaturize.
Innovation Solution
A semiconductor device with a super junction structure is fabricated using a substrate with alternating trenches and epitaxial layers of different conductivity types, allowing for controlled doping concentrations to balance charge and increase withstand voltage without increasing turn on resistance, while simplifying the fabrication process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the doping concentration of the N-type epitaxial drift region is reduced and/or the thickness is increased to increase the withstand voltage of the P-N junction, then the withstand voltage is improved, but the turn on resistance increases
Solution Approach 1:
The N-type epitaxial drift region is segmented into multiple regions with different doping concentrations. The first N-type epitaxial drift region has a first doping concentration while the second N-type epitaxial drift region has a second doping concentration different from the first. This segmentation allows different portions of the drift region to serve different functions: one portion optimized for withstand voltage and another for low turn-on resistance, thereby resolving the contradiction between these two parameters.
Solution Approach 2:
Different regions within the N-type epitaxial drift region are assigned different doping concentrations to optimize local properties. The first N-type epitaxial drift region and the second N-type epitaxial drift region have distinct doping concentrations tailored to their specific functional requirements. This local quality differentiation enables the device to achieve both high withstand voltage and low turn-on resistance simultaneously by optimizing each region's electrical characteristics for its intended purpose.
2Reliability
If the multi-epi technology is used to form the super junction structure, then the super junction structure is achieved, but the process complexity and manufacturing cost increase
Solution Approach 1:
Multiple epitaxial growth processes that would traditionally be performed separately in multi-epi technology are merged into a single epitaxial growth process. The patent forms both the first N-type epitaxial drift region and the second N-type epitaxial drift region with different doping concentrations in one continuous epitaxial growth step, rather than requiring separate growth steps. This merging significantly reduces process complexity and manufacturing cost while still achieving the desired super junction structure with differentiated doping regions.
Solution Approach 2:
The single epitaxial growth process is designed to perform multiple functions simultaneously: it forms both N-type and P-type doped regions with different doping concentrations in a unified process. This multi-functional approach eliminates the need for multiple specialized epitaxial growth steps, thereby simplifying the overall manufacturing process while maintaining the complexity of the resulting super junction structure.
3Reliability
If the multi-epi technology is used to form the super junction structure, then the super junction structure is achieved, but the device miniaturization becomes difficult
Solution Approach 1:
The super junction structure is formed by segmenting the drift region into alternating N-type and P-type doped regions with different doping concentrations. This segmentation is achieved within a compact footprint by creating vertically stacked regions with precise doping profiles. The first and second N-type epitaxial drift regions with different doping concentrations are formed in a manner that enables vertical integration, allowing the device to maintain small lateral dimensions while achieving the complex super junction architecture needed for high voltage operation.
Solution Approach 2:
The patent transitions from lateral differentiation to vertical differentiation in the doping structure. Instead of requiring large lateral areas to accommodate multiple doped regions, the different doping concentrations are stacked vertically in the first and second N-type epitaxial drift regions. This dimensional transition enables miniaturization by exploiting the vertical dimension for functional differentiation, thereby achieving the super junction structure in a compact device footprint suitable for modern miniaturization requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the withstand voltage of the P-N junction while preventing an increase in turn on resistance, simplifies the fabrication process, reduces manufacturing costs, and enables miniaturization of the device size.
Implementation Method 1
a first epitaxial layer disposed in the first trench
Data Source
Figure 1
Figure 2A~2B
Figure 2C~2D
AI summary
The field-effect transistor (20;20';20") includes a substrate (200) having a first doping region (200a) and an overlying second doping region (200b), wherein the first and second doping regions (200a;200b) have a first conductivity type and wherein the second doping region (200b) has at least one first trench (204) and at least one second trench (212) adjacent thereto. A first epitaxial layer (208;208') is disposed in the first trench (204) and has a second conductivity type. A second epitaxial layer (216;216') is disposed in the second trench (212) and has the first conductivity type, wherein the second epitaxial layer (216;216') has a doping concentration greater than that of the second doping region (200b) and less than that of the first doping region (200a). A gate structure (228;230) is disposed on the second trench (212). A method of fabricating the field-effect transistor (20;20';20") is also disclosed.