Super Junction Termination Structure With Gaps for Higher Withstand Voltage

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Solution Overview

Problem

Existing semiconductor devices with super junction structures face challenges in reducing electrical field concentration in the termination region, leading to potential voltage breakdown and reduced withstand voltage.

Innovation Solution

The semiconductor device incorporates a super junction layer with alternately disposed p-type and n-type pillar layers and a plurality of withstand voltage holding structures with gaps, allowing for effective potential distribution and reduced electrical field concentration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If continuous withstand voltage holding structures are used to surround the active region, then the structural integrity and voltage holding capability are improved, but electrical field concentration occurs at corners leading to reduced breakdown voltage

Engineering Contradiction:
Improvewithstand voltage capabilityVSAvoidelectrical field concentration
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The withstand voltage holding structure is divided into multiple discrete structures arranged in a circular pattern, with gaps between adjacent structures. This segmentation eliminates the continuous structure that causes field concentration at corners, while maintaining voltage holding capability through the distributed arrangement of multiple structures surrounding the active region

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gap is specifically introduced at the corner regions where electrical field concentration occurs most severely. The gap distance is optimized to be between 0.5-5μm to locally reduce field concentration at these critical points while maintaining the overall structural integrity and voltage holding capability of the termination region

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the drift layer thickness is reduced to lower ON resistance, then the conduction loss is reduced, but the withstand voltage capability is reduced

Engineering Contradiction:
Improveconduction lossVSAvoidwithstand voltage
Core Design Contradiction:
Loss of energyVSStrength

Solution Approach 1:

The drift layer is configured as a composite structure with a first drift layer having higher impurity concentration and a second drift layer having lower impurity concentration. This composite structure allows the lower impedance first layer to reduce conduction loss while the thinner overall structure maintains withstand voltage capability through the field distribution characteristics of the layered structure

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The introduction of gaps in the withstand voltage holding structures enhances the semiconductor device's ability to manage potential differences, thereby reducing electrical field concentration and increasing the device's withstand voltage.

Implementation Method 1

charge balance is achieved to equalize an amount of effective impurity in the p-type pillar layer and an amount of effective impurity in the n-type pillar layer

Methodology Applied
Scientific EffectCharge balance: Coulomb's Law

Implementation Method 2

The introduction of gaps in the withstand voltage holding structures enhances the semiconductor device's ability to manage potential differences, thereby reducing electrical field concentration and increasing the device's withstand voltage

Methodology Applied
Scientific EffectElectrical field distribution: Electric Field

Data Source

PatentUS12283628B2Semiconductor device, power conversion device and method of manufacturing semiconductor device
Publication Date: 2025.04.22 MITSUBISHI ELECTRIC CORP
  • US12283628B2 patent drawing
  • US12283628B2 patent drawing
  • US12283628B2 patent drawing

AI summary

A semiconductor device includes a semiconductor layer including a super junction layer in which an n-type pillar layer and a p-type pillar layer are alternately disposed and a p-type withstand voltage holding structure formed on an upper layer part of the semiconductor layer to surround an active region. At least one withstand voltage holding structure overlaps with the super junction layer in a plan view. At least one withstand voltage holding structure overlapping with the super junction layer in a plan view has a gap which is an intermittent part of the withstand voltage holding structure.