Super Junction Gate Resistance Layout for Switching Interference Control
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Solution Overview
Problem
Conventional super junction power devices have fixed gate resistance structures, which cannot be adjusted to match changing circuit design requirements, leading to potential interference and abnormal circuit operation.
Innovation Solution
A manufacturing method for a super junction power device with an adjustable gate resistance structure, involving steps such as depositing epitaxial layers, doping ions, and forming gate and source regions, allowing for the creation of independent gate resistors that can be adjusted by connecting them in series or parallel to achieve desired resistance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate resistance is reduced to improve switching speed and reduce switching loss, then the switching performance is improved, but the driving speed may cause interference between different devices in the circuit
Solution Approach 1:
The patent applies dynamics by making the gate resistance adjustable rather than fixed. The gate resistance can be dynamically changed based on circuit requirements through switching between parallel resistance paths, allowing the system to adapt switching speed to match different operating conditions and prevent circuit interference.
Solution Approach 2:
The patent changes the resistance parameter by providing multiple parallel resistance paths with different resistance values. By selectively activating different paths, the gate resistance parameter can be adjusted to optimize switching performance while preventing circuit interference in different operating scenarios.
2Ease of manufacture
If the gate resistance is fixed after production to simplify manufacturing, then the manufacturing process is simplified, but the gate resistance cannot be changed based on circuit adjustment requirements
Solution Approach 1:
The patent segments the gate resistance into multiple independent parallel resistance paths, each with its own switching control. This segmentation allows the resistance to be adjusted in discrete steps by activating different paths, maintaining manufacturing simplicity while enabling circuit adaptability.
Solution Approach 2:
The patent makes the gate resistance structure multi-functional by enabling it to serve different resistance requirements within the same device. The adjustable resistance structure can adapt to different circuit designs and operating conditions, making a single device versatile for multiple applications.
3Adaptability or versatility
If different gate resistances are required for different circuit designs, then the circuit performance can be optimized, but new masks and layouts must be created for each resistance value
Solution Approach 1:
The patent implements dynamics by providing multiple resistance paths that can be selectively activated through control signals. This dynamic switching capability allows different effective resistances to be achieved without changing the physical layout or masks, as the resistance adjustment is accomplished through electronic switching rather than physical reconfiguration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables adjustable gate resistance without changing the layout or re-making masks, reducing costs and improving the versatility of super junction power devices by allowing real-time resistance adjustments, thus preventing circuit interference.
Implementation Method 1
depositing an intrinsic epitaxial layer on a surface of a silicon substrate by chemical vapor deposition (CVD)
Implementation Method 2
doping first-type ions on the intrinsic epitaxial layer through an ion implantation process
Implementation Method 3
growing a gate oxide layer by thermal oxidation method
Implementation Method 4
depositing gate polysilicon by low-pressure CVD
Implementation Method 5
forming a gate structure by the dry etching
Implementation Method 6
removing the first mask by dry etching and wet etching
Implementation Method 7
defining column-shaped region patterns on the first mask by photolithography process
Implementation Method 8
activating the first-type ions in the intrinsic epitaxial layer by a thermal process
Data Source
AI summary
A super junction power device with an adjustable gate resistance structure and a manufacturing method thereof relate to a field of manufacturing of power devices and semiconductors. The manufacturing method includes preparing a cell structure and an adjustable gate resistance structure of the super junction power device; preparing contact through holes; preparing a metal wire layer; and preparing a passivation layer. By designing an adjustable gate resistance structure, a gate resistance of the super junction power device is flexibly adjusted within a certain gate resistance range based on application requirements, further improving an application range of the super junction power device. Through adjustable gate resistance control electrodes, open-circuit control is performed on corresponding independent gate resistors to realize an adjustment of the corresponding gate resistor, There is no need to change a layout of a gate, contact holes, and metal wire layers for different gate resistance requirements.