Vertical Super Junction MOSFET With Lateral Element Isolation
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Solution Overview
Problem
Existing semiconductor devices face challenges in integrating a lateral semiconductor element with a super junction structure vertical semiconductor element on the same substrate, leading to parasitic action and increased costs due to the need for external discrete parts in the output stage configurations.
Innovation Solution
A semiconductor device with a vertical semiconductor element and a laterally integrated semiconductor element, where the lateral element is electrically isolated by a buried isolating layer with a higher impurity concentration, forming a parallel pn-layer structure to reduce parasitic action and cost, using an epitaxial growth method for manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a super junction structure is employed to reduce on-state resistance, then the on-state resistance decreases, but the device complexity increases due to the need for parallel pn-layers and epitaxial growth processes
Solution Approach 1:
The drift layer is segmented into multiple alternating n-type and p-type columns forming parallel pn-layers. This segmentation creates the super junction structure that enables simultaneous achievement of low on-state resistance and high breakdown voltage by providing multiple current paths while maintaining voltage blocking capability.
Solution Approach 2:
The invention changes the impurity concentration parameters by forming high-concentration n-type and p-type regions in alternating columns within the drift layer. This parameter variation creates the super junction effect where the high impurity concentration columns provide low resistance paths while the alternating structure maintains high breakdown voltage.
2Area of stationary object
If a lateral semiconductor element is integrated on the same substrate as the vertical semiconductor element, then the device size and cost are reduced, but parasitic action occurs between the elements
Solution Approach 1:
An isolating structure is introduced as an intermediary between the vertical and lateral semiconductor elements. This isolating structure, positioned between the elements on the same substrate, prevents parasitic action while allowing both elements to be integrated on the same device, thereby reducing overall size and cost.
Solution Approach 2:
The device is segmented into distinct functional regions: a first region containing the vertical semiconductor element with super junction structure, and a second region containing the lateral semiconductor element. This spatial segmentation allows integration while preventing harmful interactions between the two element types.
3Reliability
If the thickness of the high resistance semiconductor layer is increased to maintain high breakdown voltage, then the breakdown voltage is maintained, but the on-state resistance increases
Solution Approach 1:
The drift layer is given non-uniform local quality by creating alternating columns of high-concentration n-type and p-type regions. The high-concentration columns provide low resistance paths for current flow, while the alternating pn-structure locally provides voltage blocking capability, allowing thin overall layer while maintaining both low on-state resistance and high breakdown voltage.
Solution Approach 2:
The drift layer is constructed as a composite structure with alternating n-type and p-type semiconductor columns. This composite material approach combines the beneficial properties of both doping types within the same layer, creating a structure that simultaneously achieves low resistance and high voltage blocking without requiring increased thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses parasitic action between elements and reduces manufacturing costs by integrating a lateral semiconductor element with a super junction structure vertical semiconductor element on the same substrate, improving the trade-off between breakdown voltage and on-state resistance.
Implementation Method 1
a first conductivity type first epitaxial layer with an impurity concentration lower than that of the first semiconductor layer being formed by epitaxial growth on the first semiconductor layer
Data Source
AI summary
A vertical super junction MOSFET and a lateral MOSFET are integrated on the same semiconductor substrate. The lateral MOSFET is electrically isolated from the vertical super junction MOSFET by an n-buried isolating layer and an n-diffused isolating layer. The lateral MOSFET is formed of a p-well region formed in an n−semiconductor layer bounded by the n-buried isolating layer and n-diffused isolating layer, an n-source region and n-drain region formed in the p-well region, and a gate electrode that covers a portion of the p-well region sandwiched by the n-source region and n-drain region. As the n-buried isolating layer is formed at the same time as an n-layer (3) of the vertical super junction MOSFET, it is possible to reduce cost. Also, it is possible to suppress parasitic action between the elements with the n-buried isolating layer.