Super Junction MOSFET Pillar Connection for Breakdown Stability
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Solution Overview
Problem
In high voltage semiconductor devices, the planar gate type MOSFETs face challenges in achieving low on-resistance due to high epi resistance, and super junction semiconductor devices with floating pillars experience uneven charge compensation, leading to insufficient breakdown voltage.
Innovation Solution
All pillar regions in the semiconductor device are connected to prevent floating, ensuring complete depletion and stabilization of the breakdown voltage, while also shortening the termination region length to facilitate smaller chip production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a planar gate type MOSFET is designed to sustain certain thicknesses and concentrations for the N-Epi region to maintain breakdown voltage, then the breakdown voltage is improved, but the on-resistance increases significantly
Solution Approach 1:
The N-Epi region is segmented into vertical pillar regions separated by P-type regions, creating a super junction structure. This segmentation allows the N-type pillars to sustain high breakdown voltage while reducing the overall on-resistance by distributing the current path through multiple parallel pillars.
Solution Approach 2:
Different regions are assigned different doping types and concentrations: N-type regions for high voltage sustainment and low resistance, P-type regions for charge compensation and depletion layer formation. This local differentiation optimizes both breakdown voltage and on-resistance characteristics in their respective zones.
2Device complexity
If floating pillars are present in the termination region of a super junction semiconductor device, then the device structure is simplified, but uneven charge compensation occurs leading to insufficient breakdown voltage
Solution Approach 1:
All pillar regions including those in the termination region are merged into a single connected structure through the poly gate, eliminating floating pillars. This ensures uniform charge compensation across all pillars and maintains consistent breakdown voltage throughout the device.
Solution Approach 2:
The poly gate connects all pillar regions to the same potential, creating equipotential conditions that ensure uniform charge compensation. This prevents the potential differences that would otherwise cause uneven depletion and varying breakdown voltages in floating pillar structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the vertical breakdown voltage and enables the production of smaller, more efficient semiconductor devices with improved performance and cost-effectiveness.
Implementation Method 1
a breakdown voltage of a device is determined by a depletion layer formed between a P+ and an N-Epi region by a voltage applied on a drain
Implementation Method 2
when both regions become identical, both the N region and the P region become completely depleted, and hence are able to receive a high breakdown voltage
Data Source
AI summary
Provided is a super junction semiconductor device. The super junction semiconductor device includes a vertical pillar region located in an active region and horizontal pillar regions located in a termination region that are connected with each other while simultaneously not floating the entire pillar region in the termination region. Thus, a charge compensation difference, generated among pillar regions, is caused to be offset, although the length of the termination region is relatively short.